Merge branch '2_6_32_for_next' of git://git.pwsan.com/linux-2.6 into for-next
authorTony Lindgren <tony@atomide.com>
Thu, 3 Sep 2009 17:17:39 +0000 (10:17 -0700)
committerTony Lindgren <tony@atomide.com>
Thu, 3 Sep 2009 17:17:39 +0000 (10:17 -0700)
1  2 
arch/arm/mach-omap2/board-3430sdp.c
arch/arm/mach-omap2/powerdomain.c
arch/arm/mach-omap2/serial.c

index 31d9f56c64839bf854d21213f4025d62b5d03749,4500e7f674d737cfa033ac86525d6a57b678c8c9..bd57ec76dc5eedde9f672d34456ed843e0cb0f64
@@@ -167,13 -167,6 +167,6 @@@ static struct platform_device *sdp3430_
        &sdp3430_lcd_device,
  };
  
- static void __init omap_3430sdp_init_irq(void)
- {
-       omap2_init_common_hw(hyb18m512160af6_sdrc_params, NULL);
-       omap_init_irq();
-       omap_gpio_init();
- }
  static struct omap_lcd_config sdp3430_lcd_config __initdata = {
        .ctrl_name      = "internal",
  };
@@@ -182,6 -175,15 +175,15 @@@ static struct omap_board_config_kernel 
        { OMAP_TAG_LCD,         &sdp3430_lcd_config },
  };
  
+ static void __init omap_3430sdp_init_irq(void)
+ {
+       omap_board_config = sdp3430_config;
+       omap_board_config_size = ARRAY_SIZE(sdp3430_config);
+       omap2_init_common_hw(hyb18m512160af6_sdrc_params, NULL);
+       omap_init_irq();
+       omap_gpio_init();
+ }
  static int sdp3430_batt_table[] = {
  /* 0 C*/
  30800, 29500, 28300, 27100,
@@@ -473,17 -475,10 +475,15 @@@ static inline void board_smc91x_init(vo
  
  #endif
  
 +static void enable_board_wakeup_source(void)
 +{
 +      omap_cfg_reg(AF26_34XX_SYS_NIRQ); /* T2 interrupt line (keypad) */
 +}
 +
  static void __init omap_3430sdp_init(void)
  {
        omap3430_i2c_init();
        platform_add_devices(sdp3430_devices, ARRAY_SIZE(sdp3430_devices));
-       omap_board_config = sdp3430_config;
-       omap_board_config_size = ARRAY_SIZE(sdp3430_config);
        if (omap_rev() > OMAP3430_REV_ES1_0)
                ts_gpio = SDP3430_TS_GPIO_IRQ_SDPV2;
        else
        omap_serial_init();
        usb_musb_init();
        board_smc91x_init();
 +      enable_board_wakeup_source();
  }
  
  static void __init omap_3430sdp_map_io(void)
index 5a6cef3e42bf8d8eb0ac2df995a899c710513e96,66206b6357fc7e7d118a645a8dbc7f1d498d26a6..2594cbff3947e12f8d37c966e22fd99a22c5a1d1
  #include <mach/powerdomain.h>
  #include <mach/clockdomain.h>
  
 +#include "pm.h"
 +
 +enum {
 +      PWRDM_STATE_NOW = 0,
 +      PWRDM_STATE_PREV,
 +};
 +
  /* pwrdm_list contains all registered struct powerdomains */
  static LIST_HEAD(pwrdm_list);
  
@@@ -90,7 -83,7 +90,7 @@@ static struct powerdomain *_pwrdm_deps_
        if (!pwrdm || !deps || !omap_chip_is(pwrdm->omap_chip))
                return ERR_PTR(-EINVAL);
  
-       for (pd = deps; pd; pd++) {
+       for (pd = deps; pd->pwrdm_name; pd++) {
  
                if (!omap_chip_is(pd->omap_chip))
                        continue;
  
        }
  
-       if (!pd)
+       if (!pd->pwrdm_name)
                return ERR_PTR(-ENOENT);
  
        return pd->pwrdm;
  }
  
 +static int _pwrdm_state_switch(struct powerdomain *pwrdm, int flag)
 +{
 +
 +      int prev;
 +      int state;
 +
 +      if (pwrdm == NULL)
 +              return -EINVAL;
 +
 +      state = pwrdm_read_pwrst(pwrdm);
 +
 +      switch (flag) {
 +      case PWRDM_STATE_NOW:
 +              prev = pwrdm->state;
 +              break;
 +      case PWRDM_STATE_PREV:
 +              prev = pwrdm_read_prev_pwrst(pwrdm);
 +              if (pwrdm->state != prev)
 +                      pwrdm->state_counter[prev]++;
 +              break;
 +      default:
 +              return -EINVAL;
 +      }
 +
 +      if (state != prev)
 +              pwrdm->state_counter[state]++;
 +
 +      pm_dbg_update_time(pwrdm, prev);
 +
 +      pwrdm->state = state;
 +
 +      return 0;
 +}
 +
 +static int _pwrdm_pre_transition_cb(struct powerdomain *pwrdm, void *unused)
 +{
 +      pwrdm_clear_all_prev_pwrst(pwrdm);
 +      _pwrdm_state_switch(pwrdm, PWRDM_STATE_NOW);
 +      return 0;
 +}
 +
 +static int _pwrdm_post_transition_cb(struct powerdomain *pwrdm, void *unused)
 +{
 +      _pwrdm_state_switch(pwrdm, PWRDM_STATE_PREV);
 +      return 0;
 +}
 +
 +static __init void _pwrdm_setup(struct powerdomain *pwrdm)
 +{
 +      int i;
 +
 +      for (i = 0; i < 4; i++)
 +              pwrdm->state_counter[i] = 0;
 +
 +      pwrdm_wait_transition(pwrdm);
 +      pwrdm->state = pwrdm_read_pwrst(pwrdm);
 +      pwrdm->state_counter[pwrdm->state] = 1;
 +
 +}
  
  /* Public functions */
  
@@@ -183,12 -117,9 +183,12 @@@ void pwrdm_init(struct powerdomain **pw
  {
        struct powerdomain **p = NULL;
  
 -      if (pwrdm_list)
 -              for (p = pwrdm_list; *p; p++)
 +      if (pwrdm_list) {
 +              for (p = pwrdm_list; *p; p++) {
                        pwrdm_register(*p);
 +                      _pwrdm_setup(*p);
 +              }
 +      }
  }
  
  /**
@@@ -286,8 -217,7 +286,8 @@@ struct powerdomain *pwrdm_lookup(const 
   * anything else to indicate failure; or -EINVAL if the function
   * pointer is null.
   */
 -int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm))
 +int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm, void *user),
 +                      void *user)
  {
        struct powerdomain *temp_pwrdm;
        unsigned long flags;
  
        read_lock_irqsave(&pwrdm_rwlock, flags);
        list_for_each_entry(temp_pwrdm, &pwrdm_list, node) {
 -              ret = (*fn)(temp_pwrdm);
 +              ret = (*fn)(temp_pwrdm, user);
                if (ret)
                        break;
        }
@@@ -1180,36 -1110,4 +1180,36 @@@ int pwrdm_wait_transition(struct powerd
        return 0;
  }
  
 +int pwrdm_state_switch(struct powerdomain *pwrdm)
 +{
 +      return _pwrdm_state_switch(pwrdm, PWRDM_STATE_NOW);
 +}
 +
 +int pwrdm_clkdm_state_switch(struct clockdomain *clkdm)
 +{
 +      if (clkdm != NULL && clkdm->pwrdm.ptr != NULL) {
 +              pwrdm_wait_transition(clkdm->pwrdm.ptr);
 +              return pwrdm_state_switch(clkdm->pwrdm.ptr);
 +      }
 +
 +      return -EINVAL;
 +}
 +int pwrdm_clk_state_switch(struct clk *clk)
 +{
 +      if (clk != NULL && clk->clkdm != NULL)
 +              return pwrdm_clkdm_state_switch(clk->clkdm);
 +      return -EINVAL;
 +}
 +
 +int pwrdm_pre_transition(void)
 +{
 +      pwrdm_for_each(_pwrdm_pre_transition_cb, NULL);
 +      return 0;
 +}
 +
 +int pwrdm_post_transition(void)
 +{
 +      pwrdm_for_each(_pwrdm_post_transition_cb, NULL);
 +      return 0;
 +}
  
index 0f508109adcc7326e2f57affa55809b6015a7695,ca28424f2fbda8accdd2ee66f48a54956e6ffea1..021130d830b5c42ddd28534a1e8d74f67a9134b2
@@@ -113,21 -113,6 +113,21 @@@ static struct plat_serial8250_port seri
        }
  };
  
 +#ifdef CONFIG_ARCH_OMAP4
 +static struct plat_serial8250_port serial_platform_data3[] = {
 +      {
 +              .membase        = IO_ADDRESS(OMAP_UART4_BASE),
 +              .mapbase        = OMAP_UART4_BASE,
 +              .irq            = 70,
 +              .flags          = UPF_BOOT_AUTOCONF,
 +              .iotype         = UPIO_MEM,
 +              .regshift       = 2,
 +              .uartclk        = OMAP24XX_BASE_BAUD * 16,
 +      }, {
 +              .flags          = 0
 +      }
 +};
 +#endif
  static inline unsigned int serial_read_reg(struct plat_serial8250_port *up,
                                           int offset)
  {
@@@ -565,20 -550,9 +565,20 @@@ static struct omap_uart_state omap_uart
                        },
                },
        },
 +#ifdef CONFIG_ARCH_OMAP4
 +      {
 +              .pdev = {
 +                      .name                   = "serial8250",
 +                      .id                     = 3
 +                      .dev                    = {
 +                              .platform_data  = serial_platform_data3,
 +                      },
 +              },
 +      },
 +#endif
  };
  
- void __init omap_serial_init(void)
+ void __init omap_serial_early_init(void)
  {
        int i;
        char name[16];
                        uart->fck = NULL;
                }
  
 -              if (!uart->ick || !uart->fck)
 -                      continue;
 +              /* FIXME: Remove this once the clkdev is ready */
 +              if (!cpu_is_omap44xx()) {
 +                      if (!uart->ick || !uart->fck)
 +                              continue;
 +              }
  
                uart->num = i;
                p->private_data = uart;
                        p->irq += 32;
  
                omap_uart_enable_clocks(uart);
+       }
+ }
+ void __init omap_serial_init(void)
+ {
+       int i;
+       for (i = 0; i < OMAP_MAX_NR_PORTS; i++) {
+               struct omap_uart_state *uart = &omap_uart[i];
+               struct platform_device *pdev = &uart->pdev;
+               struct device *dev = &pdev->dev;
                omap_uart_reset(uart);
                omap_uart_idle_init(uart);