};
};
+ fixed-rate-clocks {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ xusbxti: clock@0 {
+ compatible = "fixed-clock";
+ reg = <0>;
+ clock-frequency = <0>;
+ #clock-cells = <0>;
+ clock-output-names = "xusbxti";
+ };
+
+ xxti: clock@1 {
+ compatible = "fixed-clock";
+ reg = <1>;
+ clock-frequency = <0>;
+ #clock-cells = <0>;
+ clock-output-names = "xxti";
+ };
+
+ xtcxo: clock@2 {
+ compatible = "fixed-clock";
+ reg = <2>;
+ clock-frequency = <0>;
+ #clock-cells = <0>;
+ clock-output-names = "xtcxo";
+ };
+ };
+
pmu {
compatible = "arm,cortex-a7-pmu";
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
#size-cells = <1>;
ranges;
- fixed-rate-clocks {
- #address-cells = <1>;
- #size-cells = <0>;
-
- xusbxti: clock@0 {
- compatible = "fixed-clock";
- reg = <0>;
- clock-frequency = <0>;
- #clock-cells = <0>;
- clock-output-names = "xusbxti";
- };
-
- xxti: clock@1 {
- compatible = "fixed-clock";
- reg = <1>;
- clock-frequency = <0>;
- #clock-cells = <0>;
- clock-output-names = "xxti";
- };
-
- xtcxo: clock@2 {
- compatible = "fixed-clock";
- reg = <2>;
- clock-frequency = <0>;
- #clock-cells = <0>;
- clock-output-names = "xtcxo";
- };
- };
-
sysram@2020000 {
compatible = "mmio-sram";
reg = <0x02020000 0x40000>;