arm64: dts: qcom: sm8450: Add LLCC/system-cache-controller node

Add a DT node for Last level cache (aka. system cache) controller
which provides control over the last level cache present on SM8450
SoC.

Signed-off-by: Sai Prakash Ranjan <quic_saipraka@quicinc.com>
Tested-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/7995d003b77d5e066658af5b2cfa22ccb40b6cf7.1643355594.git.quic_saipraka@quicinc.com

diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index eccbfeea943b0c9c6a959b308d2b51ea8dcc434a..0cd5af8c03bda2356b7ea5821ca9c9c713a8d6c0 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -1353,6 +1353,13 @@
                        qcom,bcm-voters = <&apps_bcm_voter>;
                };
 
+               system-cache-controller@19200000 {
+                       compatible = "qcom,sm8450-llcc";
+                       reg = <0 0x19200000 0 0x580000>, <0 0x19a00000 0 0x80000>;
+                       reg-names = "llcc_base", "llcc_broadcast_base";
+                       interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
+               };
+
                ufs_mem_hc: ufshc@1d84000 {
                        compatible = "qcom,sm8450-ufshc", "qcom,ufshc",
                                     "jedec,ufs-2.0";