bnxt_en: allow firmware to disable VLAN offloads
authorEdwin Peer <edwin.peer@broadcom.com>
Wed, 8 Jul 2020 11:54:01 +0000 (07:54 -0400)
committerDavid S. Miller <davem@davemloft.net>
Wed, 8 Jul 2020 22:21:14 +0000 (15:21 -0700)
Bare-metal use cases require giving firmware and the embedded
application processor control over VLAN offloads. The driver should
not attempt to override or utilize this feature in such scenarios
since it will not work as expected.

Signed-off-by: Edwin Peer <edwin.peer@broadcom.com>
Signed-off-by: Michael Chan <michael.chan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/broadcom/bnxt/bnxt.c
drivers/net/ethernet/broadcom/bnxt/bnxt.h

index 749dc7cf8d64dd9907969b65763c35245342c774..43956232b0a4441fe1c4679930171630fef71735 100644 (file)
@@ -5218,6 +5218,14 @@ static int bnxt_hwrm_vnic_qcaps(struct bnxt *bp)
                if (flags &
                    VNIC_QCAPS_RESP_FLAGS_ROCE_MIRRORING_CAPABLE_VNIC_CAP)
                        bp->flags |= BNXT_FLAG_ROCE_MIRROR_CAP;
+
+               /* Older P5 fw before EXT_HW_STATS support did not set
+                * VLAN_STRIP_CAP properly.
+                */
+               if ((flags & VNIC_QCAPS_RESP_FLAGS_VLAN_STRIP_CAP) ||
+                   ((bp->flags & BNXT_FLAG_CHIP_P5) &&
+                    !(bp->fw_cap & BNXT_FW_CAP_EXT_HW_STATS_SUPPORTED)))
+                       bp->fw_cap |= BNXT_FW_CAP_VLAN_RX_STRIP;
                bp->max_tpa_v2 = le16_to_cpu(resp->max_aggs_supported);
                if (bp->max_tpa_v2)
                        bp->hw_ring_stats_size =
@@ -7049,7 +7057,7 @@ static int __bnxt_hwrm_func_qcaps(struct bnxt *bp)
        struct hwrm_func_qcaps_input req = {0};
        struct hwrm_func_qcaps_output *resp = bp->hwrm_cmd_resp_addr;
        struct bnxt_hw_resc *hw_resc = &bp->hw_resc;
-       u32 flags;
+       u32 flags, flags_ext;
 
        bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FUNC_QCAPS, -1, -1);
        req.fid = cpu_to_le16(0xffff);
@@ -7074,6 +7082,12 @@ static int __bnxt_hwrm_func_qcaps(struct bnxt *bp)
                bp->fw_cap |= BNXT_FW_CAP_ERROR_RECOVERY;
        if (flags & FUNC_QCAPS_RESP_FLAGS_ERR_RECOVER_RELOAD)
                bp->fw_cap |= BNXT_FW_CAP_ERR_RECOVER_RELOAD;
+       if (!(flags & FUNC_QCAPS_RESP_FLAGS_VLAN_ACCELERATION_TX_DISABLED))
+               bp->fw_cap |= BNXT_FW_CAP_VLAN_TX_INSERT;
+
+       flags_ext = le32_to_cpu(resp->flags_ext);
+       if (flags_ext & FUNC_QCAPS_RESP_FLAGS_EXT_EXT_HW_STATS_SUPPORTED)
+               bp->fw_cap |= BNXT_FW_CAP_EXT_HW_STATS_SUPPORTED;
 
        bp->tx_push_thresh = 0;
        if ((flags & FUNC_QCAPS_RESP_FLAGS_PUSH_MODE_SUPPORTED) &&
@@ -12052,8 +12066,10 @@ static int bnxt_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
        dev->gso_partial_features = NETIF_F_GSO_UDP_TUNNEL_CSUM |
                                    NETIF_F_GSO_GRE_CSUM;
        dev->vlan_features = dev->hw_features | NETIF_F_HIGHDMA;
-       dev->hw_features |= BNXT_HW_FEATURE_VLAN_ALL_RX |
-                           BNXT_HW_FEATURE_VLAN_ALL_TX;
+       if (bp->fw_cap & BNXT_FW_CAP_VLAN_RX_STRIP)
+               dev->hw_features |= BNXT_HW_FEATURE_VLAN_ALL_RX;
+       if (bp->fw_cap & BNXT_FW_CAP_VLAN_TX_INSERT)
+               dev->hw_features |= BNXT_HW_FEATURE_VLAN_ALL_TX;
        if (BNXT_SUPPORTS_TPA(bp))
                dev->hw_features |= NETIF_F_GRO_HW;
        dev->features |= dev->hw_features | NETIF_F_HIGHDMA;
index 13c40645f884bdd2f1f8a9dbef8c171a98bc8713..d556e5660a028e686bb270057671da27049f987c 100644 (file)
@@ -1716,6 +1716,9 @@ struct bnxt {
        #define BNXT_FW_CAP_ERR_RECOVER_RELOAD          0x00100000
        #define BNXT_FW_CAP_HOT_RESET                   0x00200000
        #define BNXT_FW_CAP_SHARED_PORT_CFG             0x00400000
+       #define BNXT_FW_CAP_VLAN_RX_STRIP               0x01000000
+       #define BNXT_FW_CAP_VLAN_TX_INSERT              0x02000000
+       #define BNXT_FW_CAP_EXT_HW_STATS_SUPPORTED      0x04000000
 
 #define BNXT_NEW_RM(bp)                ((bp)->fw_cap & BNXT_FW_CAP_NEW_RM)
        u32                     hwrm_spec_code;