net: xpcs: group EEE code together
authorRussell King (Oracle) <rmk+kernel@armlinux.org.uk>
Mon, 10 Feb 2025 10:54:15 +0000 (10:54 +0000)
committerJakub Kicinski <kuba@kernel.org>
Fri, 14 Feb 2025 21:42:52 +0000 (13:42 -0800)
Move xpcs_config_eee() with the other EEE-related functions.

Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Link: https://patch.msgid.link/E1thRQd-003w7a-MM@rmk-PC.armlinux.org.uk
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
drivers/net/pcs/pcs-xpcs.c

index cae6e837719138b03bcc7a05f32ec994980971d0..ee0c1a27f06cee24c2e73f0a27180923a0066d1a 100644 (file)
@@ -602,35 +602,6 @@ static void xpcs_get_interfaces(struct dw_xpcs *xpcs, unsigned long *interfaces)
                __set_bit(compat->interface, interfaces);
 }
 
-static int xpcs_config_eee(struct dw_xpcs *xpcs, bool enable)
-{
-       u16 mask, val;
-       int ret;
-
-       mask = DW_VR_MII_EEE_LTX_EN | DW_VR_MII_EEE_LRX_EN |
-              DW_VR_MII_EEE_TX_QUIET_EN | DW_VR_MII_EEE_RX_QUIET_EN |
-              DW_VR_MII_EEE_TX_EN_CTRL | DW_VR_MII_EEE_RX_EN_CTRL |
-              DW_VR_MII_EEE_MULT_FACT_100NS;
-
-       if (enable)
-               val = DW_VR_MII_EEE_LTX_EN | DW_VR_MII_EEE_LRX_EN |
-                     DW_VR_MII_EEE_TX_QUIET_EN | DW_VR_MII_EEE_RX_QUIET_EN |
-                     DW_VR_MII_EEE_TX_EN_CTRL | DW_VR_MII_EEE_RX_EN_CTRL |
-                     FIELD_PREP(DW_VR_MII_EEE_MULT_FACT_100NS,
-                                xpcs->eee_mult_fact);
-       else
-               val = 0;
-
-       ret = xpcs_modify(xpcs, MDIO_MMD_VEND2, DW_VR_MII_EEE_MCTRL0, mask,
-                         val);
-       if (ret < 0)
-               return ret;
-
-       return xpcs_modify(xpcs, MDIO_MMD_VEND2, DW_VR_MII_EEE_MCTRL1,
-                          DW_VR_MII_EEE_TRN_LPI,
-                          enable ? DW_VR_MII_EEE_TRN_LPI : 0);
-}
-
 static void xpcs_pre_config(struct phylink_pcs *pcs, phy_interface_t interface)
 {
        struct dw_xpcs *xpcs = phylink_pcs_to_xpcs(pcs);
@@ -1192,6 +1163,35 @@ static void xpcs_an_restart(struct phylink_pcs *pcs)
                    BMCR_ANRESTART);
 }
 
+static int xpcs_config_eee(struct dw_xpcs *xpcs, bool enable)
+{
+       u16 mask, val;
+       int ret;
+
+       mask = DW_VR_MII_EEE_LTX_EN | DW_VR_MII_EEE_LRX_EN |
+              DW_VR_MII_EEE_TX_QUIET_EN | DW_VR_MII_EEE_RX_QUIET_EN |
+              DW_VR_MII_EEE_TX_EN_CTRL | DW_VR_MII_EEE_RX_EN_CTRL |
+              DW_VR_MII_EEE_MULT_FACT_100NS;
+
+       if (enable)
+               val = DW_VR_MII_EEE_LTX_EN | DW_VR_MII_EEE_LRX_EN |
+                     DW_VR_MII_EEE_TX_QUIET_EN | DW_VR_MII_EEE_RX_QUIET_EN |
+                     DW_VR_MII_EEE_TX_EN_CTRL | DW_VR_MII_EEE_RX_EN_CTRL |
+                     FIELD_PREP(DW_VR_MII_EEE_MULT_FACT_100NS,
+                                xpcs->eee_mult_fact);
+       else
+               val = 0;
+
+       ret = xpcs_modify(xpcs, MDIO_MMD_VEND2, DW_VR_MII_EEE_MCTRL0, mask,
+                         val);
+       if (ret < 0)
+               return ret;
+
+       return xpcs_modify(xpcs, MDIO_MMD_VEND2, DW_VR_MII_EEE_MCTRL1,
+                          DW_VR_MII_EEE_TRN_LPI,
+                          enable ? DW_VR_MII_EEE_TRN_LPI : 0);
+}
+
 static void xpcs_disable_eee(struct phylink_pcs *pcs)
 {
        struct dw_xpcs *xpcs = phylink_pcs_to_xpcs(pcs);