drm/msm/dpu: Add missing "fetch" name to set_active_pipes()
authorKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Wed, 30 Apr 2025 13:00:37 +0000 (15:00 +0200)
committerDmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Mon, 12 May 2025 16:18:48 +0000 (19:18 +0300)
The set_active_pipes() callback configures CTL_FETCH_PIPE_ACTIVE and
newer DPU v12.0 comes with CTL_PIPE_ACTIVE, thus rename it to
set_active_fetch_pipes() to better match the purpose.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Jessica Zhang <quic_jesszhan@quicinc.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/651261/
Link: https://lore.kernel.org/r/20250430-b4-sm8750-display-v5-7-8cab30c3e4df@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h

index 0714936d883523e5c53bfb42f932234db76c58db..2d7af6fff2708c12520a78cc6c979b9930dffc95 100644 (file)
@@ -445,9 +445,9 @@ static void _dpu_crtc_blend_setup_mixer(struct drm_crtc *crtc,
 
        uint32_t lm_idx;
        bool bg_alpha_enable = false;
-       DECLARE_BITMAP(fetch_active, SSPP_MAX);
+       DECLARE_BITMAP(active_fetch, SSPP_MAX);
 
-       memset(fetch_active, 0, sizeof(fetch_active));
+       memset(active_fetch, 0, sizeof(active_fetch));
        drm_atomic_crtc_for_each_plane(plane, crtc) {
                state = plane->state;
                if (!state)
@@ -464,7 +464,7 @@ static void _dpu_crtc_blend_setup_mixer(struct drm_crtc *crtc,
                if (pstate->stage == DPU_STAGE_BASE && format->alpha_enable)
                        bg_alpha_enable = true;
 
-               set_bit(pstate->pipe.sspp->idx, fetch_active);
+               set_bit(pstate->pipe.sspp->idx, active_fetch);
                _dpu_crtc_blend_setup_pipe(crtc, plane,
                                           mixer, cstate->num_mixers,
                                           pstate->stage,
@@ -472,7 +472,7 @@ static void _dpu_crtc_blend_setup_mixer(struct drm_crtc *crtc,
                                           &pstate->pipe, 0, stage_cfg);
 
                if (pstate->r_pipe.sspp) {
-                       set_bit(pstate->r_pipe.sspp->idx, fetch_active);
+                       set_bit(pstate->r_pipe.sspp->idx, active_fetch);
                        _dpu_crtc_blend_setup_pipe(crtc, plane,
                                                   mixer, cstate->num_mixers,
                                                   pstate->stage,
@@ -492,8 +492,8 @@ static void _dpu_crtc_blend_setup_mixer(struct drm_crtc *crtc,
                }
        }
 
-       if (ctl->ops.set_active_pipes)
-               ctl->ops.set_active_pipes(ctl, fetch_active);
+       if (ctl->ops.set_active_fetch_pipes)
+               ctl->ops.set_active_fetch_pipes(ctl, active_fetch);
 
        _dpu_crtc_program_lm_output_roi(crtc);
 }
index 21f4d403e3c278d83d7eaa6a7dd53f471d9e296d..65ec632a22949ed3aa2940343cab539852d40ecf 100644 (file)
@@ -711,8 +711,8 @@ static void dpu_hw_ctl_reset_intf_cfg_v1(struct dpu_hw_ctl *ctx,
        }
 }
 
-static void dpu_hw_ctl_set_fetch_pipe_active(struct dpu_hw_ctl *ctx,
-       unsigned long *fetch_active)
+static void dpu_hw_ctl_set_active_fetch_pipes(struct dpu_hw_ctl *ctx,
+                                             unsigned long *fetch_active)
 {
        int i;
        u32 val = 0;
@@ -775,7 +775,7 @@ static void _setup_ctl_ops(struct dpu_hw_ctl_ops *ops,
                ops->update_pending_flush_dspp = dpu_hw_ctl_update_pending_flush_dspp;
 
        if (cap & BIT(DPU_CTL_FETCH_ACTIVE))
-               ops->set_active_pipes = dpu_hw_ctl_set_fetch_pipe_active;
+               ops->set_active_fetch_pipes = dpu_hw_ctl_set_active_fetch_pipes;
 };
 
 /**
index cea23436fc80a17a679363a47f9f287b72623a1c..feb09590bc8fc5c77c2c673fd888c28281a98b5a 100644 (file)
@@ -256,7 +256,7 @@ struct dpu_hw_ctl_ops {
        void (*setup_blendstage)(struct dpu_hw_ctl *ctx,
                enum dpu_lm lm, struct dpu_hw_stage_cfg *cfg);
 
-       void (*set_active_pipes)(struct dpu_hw_ctl *ctx,
+       void (*set_active_fetch_pipes)(struct dpu_hw_ctl *ctx,
                unsigned long *fetch_active);
 };