arm: omap3: am35x: Don't mark missing features as present
authorMark A. Greer <mgreer@animalcreek.com>
Mon, 30 Apr 2012 23:57:09 +0000 (16:57 -0700)
committerKevin Hilman <khilman@ti.com>
Fri, 11 May 2012 23:47:19 +0000 (16:47 -0700)
The Chip Identification register on the am35x family of SoCs
has bits 12, 7:5, and 3:2 marked as reserved and are read as
zeroes.  Unfortunately, on other omap SoCs, a 0 bit means a
feature is "Full Use" so the OMAP3_CHECK_FEATURE() macro
called by omap3_check_features() will incorrectly interpret
those zeroes to mean that a feature is present even though it
isn't.  To fix that, the feature bits that are incorrectly
set (namely, OMAP3_HAS_IVA and OMAP3_HAS_ISP) need to be
cleared after all of the calls to OMAP3_CHECK_FEATURE() in
omap3_check_features() are made.

Signed-off-by: Mark A. Greer <mgreer@animalcreek.com>
[khilman@ti.com: use soc_is_am35xx() instead of cpu_is_am35xx()]
Signed-off-by: Kevin Hilman <khilman@ti.com>
arch/arm/mach-omap2/id.c

index f611e309715741218f15d0a5addb2c444753d48c..38ae74f8e77aa38bfe9284744bd85b598699ca75 100644 (file)
@@ -246,6 +246,17 @@ void __init omap3xxx_check_features(void)
 
        omap_features |= OMAP3_HAS_SDRC;
 
+       /*
+        * am35x fixups:
+        * - The am35x Chip ID register has bits 12, 7:5, and 3:2 marked as
+        *   reserved and therefore return 0 when read.  Unfortunately,
+        *   OMAP3_CHECK_FEATURE() will interpret some of those zeroes to
+        *   mean that a feature is present even though it isn't so clear
+        *   the incorrectly set feature bits.
+        */
+       if (soc_is_am35xx())
+               omap_features &= ~(OMAP3_HAS_IVA | OMAP3_HAS_ISP);
+
        /*
         * TODO: Get additional info (where applicable)
         *       e.g. Size of L2 cache.