Merge tag 'qcom-arm64-fixes-for-6.2' into arm64-for-6.3

Qualcomm ARM64 DTS fixes for 6.2

The cluster idle issue was resolved on SM8250, so the change disabling
the cluster state is being reverted.

Issues where identified with the QMP PHY binding, that would prevent
enablement of Displayport and it was decided not to support the old
binding for the recently introduced SC8280XP, which broke USB. This
adjusts the USB PHY nodes to the new binding. The reset signal for the
first QMP PHY is corrected as well.

The reserved memory map is updated on Xiaomi Mi 4C and Huawei Nexus 6P,
to avoid instabilities caused by use of protected memory regions.
The compatible for the MSM8992 TCSR mutex is corrected as well.

Lastly SDHCI interconnects on SM8350 are corrected to match the
providers #interconnect-cells.

diff --cc arch/arm64/boot/dts/qcom/sc8280xp.dtsi
index 5d5bf615f82d2fb7781eb6487d3a37f11412b980,71cf81a8eb4da67e0724a5ea36a6f69c93265f42..5f03cb86184a40e519683d33c986fb6c49d7af66
--- 1/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
--- 2/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
@@@ -11,10 -10,9 +11,11 @@@
  #include <dt-bindings/interconnect/qcom,sc8280xp.h>
  #include <dt-bindings/interrupt-controller/arm-gic.h>
  #include <dt-bindings/mailbox/qcom-ipcc.h>
+ #include <dt-bindings/phy/phy-qcom-qmp.h>
  #include <dt-bindings/power/qcom-rpmpd.h>
 +#include <dt-bindings/soc/qcom,gpr.h>
  #include <dt-bindings/soc/qcom,rpmh-rsc.h>
 +#include <dt-bindings/sound/qcom,q6afe.h>
  #include <dt-bindings/thermal/thermal.h>
  
  / {
@@@ -2123,61 -1726,12 +2105,48 @@@
                                 <&gcc GCC_USB4_1_DP_PHY_PRIM_BCR>;
                        reset-names = "phy", "common";
  
-                       power-domains = <&gcc USB30_SEC_GDSC>;
+                       #clock-cells = <1>;
+                       #phy-cells = <1>;
  
                        status = "disabled";
- 
-                       usb_1_ssphy: usb3-phy@8903400 {
-                               reg = <0 0x08903400 0 0x100>,
-                                     <0 0x08903600 0 0x3ec>,
-                                     <0 0x08904400 0 0x364>,
-                                     <0 0x08903a00 0 0x100>,
-                                     <0 0x08903c00 0 0x3ec>,
-                                     <0 0x08904200 0 0x18>;
-                               #phy-cells = <0>;
-                               #clock-cells = <0>;
-                               clocks = <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>;
-                               clock-names = "pipe0";
-                               clock-output-names = "usb1_phy_pipe_clk_src";
-                       };
                };
  
 +              mdss1_dp0_phy: phy@8909a00 {
 +                      compatible = "qcom,sc8280xp-dp-phy";
 +                      reg = <0 0x08909a00 0 0x19c>,
 +                            <0 0x08909200 0 0xec>,
 +                            <0 0x08909600 0 0xec>,
 +                            <0 0x08909000 0 0x1c8>;
 +
 +                      clocks = <&dispcc1 DISP_CC_MDSS_DPTX0_AUX_CLK>,
 +                               <&dispcc1 DISP_CC_MDSS_AHB_CLK>;
 +                      clock-names = "aux", "cfg_ahb";
 +                      power-domains = <&rpmhpd SC8280XP_MX>;
 +
 +                      #clock-cells = <1>;
 +                      #phy-cells = <0>;
 +
 +                      status = "disabled";
 +              };
 +
 +              mdss1_dp1_phy: phy@890ca00 {
 +                      compatible = "qcom,sc8280xp-dp-phy";
 +                      reg = <0 0x0890ca00 0 0x19c>,
 +                            <0 0x0890c200 0 0xec>,
 +                            <0 0x0890c600 0 0xec>,
 +                            <0 0x0890c000 0 0x1c8>;
 +
 +                      clocks = <&dispcc1 DISP_CC_MDSS_DPTX1_AUX_CLK>,
 +                               <&dispcc1 DISP_CC_MDSS_AHB_CLK>;
 +                      clock-names = "aux", "cfg_ahb";
 +                      power-domains = <&rpmhpd SC8280XP_MX>;
 +
 +                      #clock-cells = <1>;
 +                      #phy-cells = <0>;
 +
 +                      status = "disabled";
 +              };
 +
                pmu@9091000 {
                        compatible = "qcom,sc8280xp-llcc-bwmon", "qcom,sc7280-llcc-bwmon";
                        reg = <0 0x9091000 0 0x1000>;

diff --cc arch/arm64/boot/dts/qcom/sm8250.dtsi
Simple merge

diff --cc arch/arm64/boot/dts/qcom/sm8350.dtsi
Simple merge