arm64: dts: qcom: msm8916: Add i2c-qcom-cci node

The msm8916 CCI controller provides one CCI/I2C bus.

Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Signed-off-by: Robert Foss <robert.foss@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20200324155843.10719-2-robert.foss@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index 2fdc6aa61b83a6f91b621ee88a8ece28b98d601b..0eba168f0a5cca1d1dbfca42a6d5e41bf6a7fead 100644 (file)
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -1604,6 +1604,33 @@
                                #size-cells = <0>;
                        };
                };
+
+               cci: cci@1b0c000 {
+                       compatible = "qcom,msm8916-cci";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <0x1b0c000 0x1000>;
+                       interrupts = <GIC_SPI 50 IRQ_TYPE_EDGE_RISING>;
+                       clocks = <&gcc GCC_CAMSS_TOP_AHB_CLK>,
+                               <&gcc GCC_CAMSS_CCI_AHB_CLK>,
+                               <&gcc GCC_CAMSS_CCI_CLK>,
+                               <&gcc GCC_CAMSS_AHB_CLK>;
+                       clock-names = "camss_top_ahb", "cci_ahb",
+                                         "cci", "camss_ahb";
+                       assigned-clocks = <&gcc GCC_CAMSS_CCI_AHB_CLK>,
+                                         <&gcc GCC_CAMSS_CCI_CLK>;
+                       assigned-clock-rates = <80000000>, <19200000>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&cci0_default>;
+                       status = "disabled";
+
+                       cci_i2c0: i2c-bus@0 {
+                               reg = <0>;
+                               clock-frequency = <400000>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                       };
+               };
        };
 
        smd {