drm/amdgpu/mes10.1: install mes queue via kiq

Install mes queue via kiq. Disable it temporarily
until it's workable.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v10_1.c b/drivers/gpu/drm/amd/amdgpu/mes_v10_1.c
index 02c7e4807a3e4e3083952211ffd4cba83b4e1829..31e8e7120640e57a808528a9b6f9a4403df9b3c8 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/mes_v10_1.c
+++ b/drivers/gpu/drm/amd/amdgpu/mes_v10_1.c
@@ -542,6 +542,33 @@ static void mes_v10_1_queue_init_register(struct amdgpu_ring *ring)
        mutex_unlock(&adev->srbm_mutex);
 }
 
+#if 0
+static int mes_v10_1_kiq_enable_queue(struct amdgpu_device *adev)
+{
+       struct amdgpu_kiq *kiq = &adev->gfx.kiq;
+       struct amdgpu_ring *kiq_ring = &adev->gfx.kiq.ring;
+       int r;
+
+       if (!kiq->pmf || !kiq->pmf->kiq_map_queues)
+               return -EINVAL;
+
+       r = amdgpu_ring_alloc(kiq_ring, kiq->pmf->map_queues_size);
+       if (r) {
+               DRM_ERROR("Failed to lock KIQ (%d).\n", r);
+               return r;
+       }
+
+       kiq->pmf->kiq_map_queues(kiq_ring, &adev->mes.ring);
+
+       r = amdgpu_ring_test_ring(kiq_ring);
+       if (r) {
+               DRM_ERROR("kfq enable failed\n");
+               kiq_ring->sched.ready = false;
+       }
+       return r;
+}
+#endif
+
 static int mes_v10_1_ring_init(struct amdgpu_device *adev)
 {
        struct amdgpu_ring *ring;