Merge tag 'timers-v5.9' of https://git.linaro.org/people/daniel.lezcano/linux into...
authorThomas Gleixner <tglx@linutronix.de>
Thu, 23 Jul 2020 19:04:05 +0000 (21:04 +0200)
committerThomas Gleixner <tglx@linutronix.de>
Thu, 23 Jul 2020 19:04:05 +0000 (21:04 +0200)
Pull clock event/surce driver changes from Daniel Lezcano:

  - Add sama5d2 support and rework the 32kHz clock handling (Alexandre Belloni)
  - Add the high resolution support for SMP/SMT on the Ingenic timer (Zhou Yanjie)
  - Add support for i.MX TPM driver with ARM64 (Anson Huang)
  - Fix typo by replacing KHz to kHz (Geert Uytterhoeven)
  - Add 32kHz support by setting the minimum ticks to 5 on Nomadik MTU (Linus Walleij)
  - Replace HTTP links with HTTPS ones for security reasons (Alexander A. Klimov)
  - Add support for the Ingenic X1000 OST (Zhou Yanjie)

1  2 
arch/arm/boot/dts/sama5d2.dtsi

index 31d8766ec7ef4cd7135a7ca6f5693e287abce2f0,996143e966d83e9bdff56de34349123399c97e02..d7f25706892d64b815edab2547a1c3e8b4c445dc
        aliases {
                serial0 = &uart1;
                serial1 = &uart3;
 -              tcb0 = &tcb0;
 -              tcb1 = &tcb1;
 -              i2s0 = &i2s0;
 -              i2s1 = &i2s1;
        };
  
        cpus {
                };
  
                usb0: gadget@300000 {
 -                      #address-cells = <1>;
 -                      #size-cells = <0>;
                        compatible = "atmel,sama5d3-udc";
                        reg = <0x00300000 0x100000
                               0xfc02c000 0x400>;
                        clocks = <&pmc PMC_TYPE_PERIPHERAL 42>, <&pmc PMC_TYPE_CORE PMC_UTMI>;
                        clock-names = "pclk", "hclk";
                        status = "disabled";
 -
 -                      ep@0 {
 -                              reg = <0>;
 -                              atmel,fifo-size = <64>;
 -                              atmel,nb-banks = <1>;
 -                      };
 -
 -                      ep@1 {
 -                              reg = <1>;
 -                              atmel,fifo-size = <1024>;
 -                              atmel,nb-banks = <3>;
 -                              atmel,can-dma;
 -                              atmel,can-isoc;
 -                      };
 -
 -                      ep@2 {
 -                              reg = <2>;
 -                              atmel,fifo-size = <1024>;
 -                              atmel,nb-banks = <3>;
 -                              atmel,can-dma;
 -                              atmel,can-isoc;
 -                      };
 -
 -                      ep@3 {
 -                              reg = <3>;
 -                              atmel,fifo-size = <1024>;
 -                              atmel,nb-banks = <2>;
 -                              atmel,can-dma;
 -                              atmel,can-isoc;
 -                      };
 -
 -                      ep@4 {
 -                              reg = <4>;
 -                              atmel,fifo-size = <1024>;
 -                              atmel,nb-banks = <2>;
 -                              atmel,can-dma;
 -                              atmel,can-isoc;
 -                      };
 -
 -                      ep@5 {
 -                              reg = <5>;
 -                              atmel,fifo-size = <1024>;
 -                              atmel,nb-banks = <2>;
 -                              atmel,can-dma;
 -                              atmel,can-isoc;
 -                      };
 -
 -                      ep@6 {
 -                              reg = <6>;
 -                              atmel,fifo-size = <1024>;
 -                              atmel,nb-banks = <2>;
 -                              atmel,can-dma;
 -                              atmel,can-isoc;
 -                      };
 -
 -                      ep@7 {
 -                              reg = <7>;
 -                              atmel,fifo-size = <1024>;
 -                              atmel,nb-banks = <2>;
 -                              atmel,can-dma;
 -                              atmel,can-isoc;
 -                      };
 -
 -                      ep@8 {
 -                              reg = <8>;
 -                              atmel,fifo-size = <1024>;
 -                              atmel,nb-banks = <2>;
 -                              atmel,can-isoc;
 -                      };
 -
 -                      ep@9 {
 -                              reg = <9>;
 -                              atmel,fifo-size = <1024>;
 -                              atmel,nb-banks = <2>;
 -                              atmel,can-isoc;
 -                      };
 -
 -                      ep@10 {
 -                              reg = <10>;
 -                              atmel,fifo-size = <1024>;
 -                              atmel,nb-banks = <2>;
 -                              atmel,can-isoc;
 -                      };
 -
 -                      ep@11 {
 -                              reg = <11>;
 -                              atmel,fifo-size = <1024>;
 -                              atmel,nb-banks = <2>;
 -                              atmel,can-isoc;
 -                      };
 -
 -                      ep@12 {
 -                              reg = <12>;
 -                              atmel,fifo-size = <1024>;
 -                              atmel,nb-banks = <2>;
 -                              atmel,can-isoc;
 -                      };
 -
 -                      ep@13 {
 -                              reg = <13>;
 -                              atmel,fifo-size = <1024>;
 -                              atmel,nb-banks = <2>;
 -                              atmel,can-isoc;
 -                      };
 -
 -                      ep@14 {
 -                              reg = <14>;
 -                              atmel,fifo-size = <1024>;
 -                              atmel,nb-banks = <2>;
 -                              atmel,can-isoc;
 -                      };
 -
 -                      ep@15 {
 -                              reg = <15>;
 -                              atmel,fifo-size = <1024>;
 -                              atmel,nb-banks = <2>;
 -                              atmel,can-isoc;
 -                      };
                };
  
                usb1: ohci@400000 {
                        };
  
                        tcb0: timer@f800c000 {
-                               compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
+                               compatible = "atmel,sama5d2-tcb", "simple-mfd", "syscon";
                                #address-cells = <1>;
                                #size-cells = <0>;
                                reg = <0xf800c000 0x100>;
                                interrupts = <35 IRQ_TYPE_LEVEL_HIGH 0>;
-                               clocks = <&pmc PMC_TYPE_PERIPHERAL 35>, <&clk32k>;
-                               clock-names = "t0_clk", "slow_clk";
+                               clocks = <&pmc PMC_TYPE_PERIPHERAL 35>, <&pmc PMC_TYPE_GCK 35>, <&clk32k>;
+                               clock-names = "t0_clk", "gclk", "slow_clk";
                        };
  
                        tcb1: timer@f8010000 {
-                               compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
+                               compatible = "atmel,sama5d2-tcb", "simple-mfd", "syscon";
                                #address-cells = <1>;
                                #size-cells = <0>;
                                reg = <0xf8010000 0x100>;
                                interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>;
-                               clocks = <&pmc PMC_TYPE_PERIPHERAL 36>, <&clk32k>;
-                               clock-names = "t0_clk", "slow_clk";
+                               clocks = <&pmc PMC_TYPE_PERIPHERAL 36>, <&pmc PMC_TYPE_GCK 36>, <&clk32k>;
+                               clock-names = "t0_clk", "gclk", "slow_clk";
                        };
  
                        hsmc: hsmc@f8014000 {
                                #size-cells = <1>;
                                ranges = <0x0 0xf8034000 0x800>;
                                status = "disabled";
 +
 +                              uart5: serial@200 {
 +                                      compatible = "atmel,at91sam9260-usart";
 +                                      reg = <0x200 0x200>;
 +                                      interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>;
 +                                      clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
 +                                      clock-names = "usart";
 +                                      dmas = <&dma0
 +                                              (AT91_XDMAC_DT_MEM_IF(0) |
 +                                               AT91_XDMAC_DT_PER_IF(1) |
 +                                               AT91_XDMAC_DT_PERID(11))>,
 +                                             <&dma0
 +                                              (AT91_XDMAC_DT_MEM_IF(0) |
 +                                               AT91_XDMAC_DT_PER_IF(1) |
 +                                               AT91_XDMAC_DT_PERID(12))>;
 +                                      dma-names = "tx", "rx";
 +                                      atmel,fifo-size = <32>;
 +                                      status = "disabled";
 +                              };
 +
 +                              spi2: spi@400 {
 +                                      compatible = "atmel,at91rm9200-spi";
 +                                      reg = <0x400 0x200>;
 +                                      interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>;
 +                                      clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
 +                                      clock-names = "spi_clk";
 +                                      dmas = <&dma0
 +                                              (AT91_XDMAC_DT_MEM_IF(0) |
 +                                               AT91_XDMAC_DT_PER_IF(1) |
 +                                               AT91_XDMAC_DT_PERID(11))>,
 +                                             <&dma0
 +                                              (AT91_XDMAC_DT_MEM_IF(0) |
 +                                               AT91_XDMAC_DT_PER_IF(1) |
 +                                               AT91_XDMAC_DT_PERID(12))>;
 +                                      dma-names = "tx", "rx";
 +                                      atmel,fifo-size = <16>;
 +                                      status = "disabled";
 +                              };
 +
 +                              i2c2: i2c@600 {
 +                                      compatible = "atmel,sama5d2-i2c";
 +                                      reg = <0x600 0x200>;
 +                                      interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>;
 +                                      #address-cells = <1>;
 +                                      #size-cells = <0>;
 +                                      clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
 +                                      dmas = <&dma0
 +                                              (AT91_XDMAC_DT_MEM_IF(0) |
 +                                               AT91_XDMAC_DT_PER_IF(1) |
 +                                               AT91_XDMAC_DT_PERID(11))>,
 +                                             <&dma0
 +                                              (AT91_XDMAC_DT_MEM_IF(0) |
 +                                               AT91_XDMAC_DT_PER_IF(1) |
 +                                               AT91_XDMAC_DT_PERID(12))>;
 +                                      dma-names = "tx", "rx";
 +                                      atmel,fifo-size = <16>;
 +                                      status = "disabled";
 +                              };
                        };
  
                        flx1: flexcom@f8038000 {
                                #size-cells = <1>;
                                ranges = <0x0 0xf8038000 0x800>;
                                status = "disabled";
 +
 +                              uart6: serial@200 {
 +                                      compatible = "atmel,at91sam9260-usart";
 +                                      reg = <0x200 0x200>;
 +                                      interrupts = <20 IRQ_TYPE_LEVEL_HIGH 7>;
 +                                      clocks = <&pmc PMC_TYPE_PERIPHERAL 20>;
 +                                      clock-names = "usart";
 +                                      dmas = <&dma0
 +                                              (AT91_XDMAC_DT_MEM_IF(0) |
 +                                               AT91_XDMAC_DT_PER_IF(1) |
 +                                               AT91_XDMAC_DT_PERID(13))>,
 +                                             <&dma0
 +                                              (AT91_XDMAC_DT_MEM_IF(0) |
 +                                               AT91_XDMAC_DT_PER_IF(1) |
 +                                               AT91_XDMAC_DT_PERID(14))>;
 +                                      dma-names = "tx", "rx";
 +                                      atmel,fifo-size = <32>;
 +                                      status = "disabled";
 +                              };
 +
 +                              spi3: spi@400 {
 +                                      compatible = "atmel,at91rm9200-spi";
 +                                      reg = <0x400 0x200>;
 +                                      interrupts = <20 IRQ_TYPE_LEVEL_HIGH 7>;
 +                                      clocks = <&pmc PMC_TYPE_PERIPHERAL 20>;
 +                                      clock-names = "spi_clk";
 +                                      dmas = <&dma0
 +                                              (AT91_XDMAC_DT_MEM_IF(0) |
 +                                               AT91_XDMAC_DT_PER_IF(1) |
 +                                               AT91_XDMAC_DT_PERID(13))>,
 +                                             <&dma0
 +                                              (AT91_XDMAC_DT_MEM_IF(0) |
 +                                               AT91_XDMAC_DT_PER_IF(1) |
 +                                               AT91_XDMAC_DT_PERID(14))>;
 +                                      dma-names = "tx", "rx";
 +                                      atmel,fifo-size = <16>;
 +                                      status = "disabled";
 +                              };
 +
 +                              i2c3: i2c@600 {
 +                                      compatible = "atmel,sama5d2-i2c";
 +                                      reg = <0x600 0x200>;
 +                                      interrupts = <20 IRQ_TYPE_LEVEL_HIGH 7>;
 +                                      #address-cells = <1>;
 +                                      #size-cells = <0>;
 +                                      clocks = <&pmc PMC_TYPE_PERIPHERAL 20>;
 +                                      dmas = <&dma0
 +                                              (AT91_XDMAC_DT_MEM_IF(0) |
 +                                               AT91_XDMAC_DT_PER_IF(1) |
 +                                               AT91_XDMAC_DT_PERID(13))>,
 +                                             <&dma0
 +                                              (AT91_XDMAC_DT_MEM_IF(0) |
 +                                               AT91_XDMAC_DT_PER_IF(1) |
 +                                               AT91_XDMAC_DT_PERID(14))>;
 +                                      dma-names = "tx", "rx";
 +                                      atmel,fifo-size = <16>;
 +                                      status = "disabled";
 +                              };
                        };
  
                        securam: sram@f8044000 {
                                #size-cells = <1>;
                                ranges = <0x0 0xfc010000 0x800>;
                                status = "disabled";
 +
 +                              uart7: serial@200 {
 +                                      compatible = "atmel,at91sam9260-usart";
 +                                      reg = <0x200 0x200>;
 +                                      interrupts = <21 IRQ_TYPE_LEVEL_HIGH 7>;
 +                                      clocks = <&pmc PMC_TYPE_PERIPHERAL 21>;
 +                                      clock-names = "usart";
 +                                      dmas = <&dma0
 +                                              (AT91_XDMAC_DT_MEM_IF(0) |
 +                                               AT91_XDMAC_DT_PER_IF(1) |
 +                                               AT91_XDMAC_DT_PERID(15))>,
 +                                              <&dma0
 +                                              (AT91_XDMAC_DT_MEM_IF(0) |
 +                                               AT91_XDMAC_DT_PER_IF(1) |
 +                                               AT91_XDMAC_DT_PERID(16))>;
 +                                      dma-names = "tx", "rx";
 +                                      atmel,fifo-size = <32>;
 +                                      status = "disabled";
 +                              };
 +
 +                              spi4: spi@400 {
 +                                      compatible = "atmel,at91rm9200-spi";
 +                                      reg = <0x400 0x200>;
 +                                      interrupts = <21 IRQ_TYPE_LEVEL_HIGH 7>;
 +                                      clocks = <&pmc PMC_TYPE_PERIPHERAL 21>;
 +                                      clock-names = "spi_clk";
 +                                      dmas = <&dma0
 +                                              (AT91_XDMAC_DT_MEM_IF(0) |
 +                                               AT91_XDMAC_DT_PER_IF(1) |
 +                                               AT91_XDMAC_DT_PERID(15))>,
 +                                              <&dma0
 +                                              (AT91_XDMAC_DT_MEM_IF(0) |
 +                                               AT91_XDMAC_DT_PER_IF(1) |
 +                                               AT91_XDMAC_DT_PERID(16))>;
 +                                      dma-names = "tx", "rx";
 +                                      atmel,fifo-size = <16>;
 +                                      status = "disabled";
 +                              };
 +
 +                              i2c4: i2c@600 {
 +                                      compatible = "atmel,sama5d2-i2c";
 +                                      reg = <0x600 0x200>;
 +                                      interrupts = <21 IRQ_TYPE_LEVEL_HIGH 7>;
 +                                      #address-cells = <1>;
 +                                      #size-cells = <0>;
 +                                      clocks = <&pmc PMC_TYPE_PERIPHERAL 21>;
 +                                      dmas = <&dma0
 +                                              (AT91_XDMAC_DT_MEM_IF(0) |
 +                                               AT91_XDMAC_DT_PER_IF(1) |
 +                                               AT91_XDMAC_DT_PERID(15))>,
 +                                              <&dma0
 +                                              (AT91_XDMAC_DT_MEM_IF(0) |
 +                                               AT91_XDMAC_DT_PER_IF(1) |
 +                                               AT91_XDMAC_DT_PERID(16))>;
 +                                      dma-names = "tx", "rx";
 +                                      atmel,fifo-size = <16>;
 +                                      status = "disabled";
 +                              };
                        };
  
                        flx3: flexcom@fc014000 {
                                #size-cells = <1>;
                                ranges = <0x0 0xfc014000 0x800>;
                                status = "disabled";
 +
 +                              uart8: serial@200 {
 +                                      compatible = "atmel,at91sam9260-usart";
 +                                      reg = <0x200 0x200>;
 +                                      interrupts = <22 IRQ_TYPE_LEVEL_HIGH 7>;
 +                                      clocks = <&pmc PMC_TYPE_PERIPHERAL 22>;
 +                                      clock-names = "usart";
 +                                      dmas = <&dma0
 +                                              (AT91_XDMAC_DT_MEM_IF(0) |
 +                                               AT91_XDMAC_DT_PER_IF(1) |
 +                                               AT91_XDMAC_DT_PERID(17))>,
 +                                             <&dma0
 +                                              (AT91_XDMAC_DT_MEM_IF(0) |
 +                                               AT91_XDMAC_DT_PER_IF(1) |
 +                                               AT91_XDMAC_DT_PERID(18))>;
 +                                      dma-names = "tx", "rx";
 +                                      atmel,fifo-size = <32>;
 +                                      status = "disabled";
 +                              };
 +
 +                              spi5: spi@400 {
 +                                      compatible = "atmel,at91rm9200-spi";
 +                                      reg = <0x400 0x200>;
 +                                      interrupts = <22 IRQ_TYPE_LEVEL_HIGH 7>;
 +                                      clocks = <&pmc PMC_TYPE_PERIPHERAL 22>;
 +                                      clock-names = "spi_clk";
 +                                      dmas = <&dma0
 +                                              (AT91_XDMAC_DT_MEM_IF(0) |
 +                                               AT91_XDMAC_DT_PER_IF(1) |
 +                                               AT91_XDMAC_DT_PERID(17))>,
 +                                             <&dma0
 +                                              (AT91_XDMAC_DT_MEM_IF(0) |
 +                                               AT91_XDMAC_DT_PER_IF(1) |
 +                                               AT91_XDMAC_DT_PERID(18))>;
 +                                      dma-names = "tx", "rx";
 +                                      atmel,fifo-size = <16>;
 +                                      status = "disabled";
 +                              };
 +
 +                              i2c5: i2c@600 {
 +                                      compatible = "atmel,sama5d2-i2c";
 +                                      reg = <0x600 0x200>;
 +                                      interrupts = <22 IRQ_TYPE_LEVEL_HIGH 7>;
 +                                      #address-cells = <1>;
 +                                      #size-cells = <0>;
 +                                      clocks = <&pmc PMC_TYPE_PERIPHERAL 22>;
 +                                      dmas = <&dma0
 +                                              (AT91_XDMAC_DT_MEM_IF(0) |
 +                                               AT91_XDMAC_DT_PER_IF(1) |
 +                                               AT91_XDMAC_DT_PERID(17))>,
 +                                             <&dma0
 +                                              (AT91_XDMAC_DT_MEM_IF(0) |
 +                                               AT91_XDMAC_DT_PER_IF(1) |
 +                                               AT91_XDMAC_DT_PERID(18))>;
 +                                      dma-names = "tx", "rx";
 +                                      atmel,fifo-size = <16>;
 +                                      status = "disabled";
 +                              };
 +
                        };
  
                        flx4: flexcom@fc018000 {
                                #size-cells = <1>;
                                ranges = <0x0 0xfc018000 0x800>;
                                status = "disabled";
 +
 +                              uart9: serial@200 {
 +                                      compatible = "atmel,at91sam9260-usart";
 +                                      reg = <0x200 0x200>;
 +                                      interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>;
 +                                      clocks = <&pmc PMC_TYPE_PERIPHERAL 23>;
 +                                      clock-names = "usart";
 +                                      dmas = <&dma0
 +                                              (AT91_XDMAC_DT_MEM_IF(0) |
 +                                               AT91_XDMAC_DT_PER_IF(1) |
 +                                               AT91_XDMAC_DT_PERID(19))>,
 +                                             <&dma0
 +                                              (AT91_XDMAC_DT_MEM_IF(0) |
 +                                               AT91_XDMAC_DT_PER_IF(1) |
 +                                               AT91_XDMAC_DT_PERID(20))>;
 +                                      dma-names = "tx", "rx";
 +                                      atmel,fifo-size = <32>;
 +                                      status = "disabled";
 +                              };
 +
 +                              spi6: spi@400 {
 +                                      compatible = "atmel,at91rm9200-spi";
 +                                      reg = <0x400 0x200>;
 +                                      interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>;
 +                                      clocks = <&pmc PMC_TYPE_PERIPHERAL 23>;
 +                                      clock-names = "spi_clk";
 +                                      dmas = <&dma0
 +                                              (AT91_XDMAC_DT_MEM_IF(0) |
 +                                               AT91_XDMAC_DT_PER_IF(1) |
 +                                               AT91_XDMAC_DT_PERID(19))>,
 +                                             <&dma0
 +                                              (AT91_XDMAC_DT_MEM_IF(0) |
 +                                               AT91_XDMAC_DT_PER_IF(1) |
 +                                               AT91_XDMAC_DT_PERID(20))>;
 +                                      dma-names = "tx", "rx";
 +                                      atmel,fifo-size = <16>;
 +                                      status = "disabled";
 +                              };
 +
 +                              i2c6: i2c@600 {
 +                                      compatible = "atmel,sama5d2-i2c";
 +                                      reg = <0x600 0x200>;
 +                                      interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>;
 +                                      #address-cells = <1>;
 +                                      #size-cells = <0>;
 +                                      clocks = <&pmc PMC_TYPE_PERIPHERAL 23>;
 +                                      dmas = <&dma0
 +                                              (AT91_XDMAC_DT_MEM_IF(0) |
 +                                               AT91_XDMAC_DT_PER_IF(1) |
 +                                               AT91_XDMAC_DT_PERID(19))>,
 +                                             <&dma0
 +                                              (AT91_XDMAC_DT_MEM_IF(0) |
 +                                               AT91_XDMAC_DT_PER_IF(1) |
 +                                               AT91_XDMAC_DT_PERID(20))>;
 +                                      dma-names = "tx", "rx";
 +                                      atmel,fifo-size = <16>;
 +                                      status = "disabled";
 +                              };
                        };
  
                        trng@fc01c000 {