drm/i915/adlp: Add MST short HBlank WA (Wa_14014143976)

Add a workaround to fix BS jitter issues on MST links if the HBLANK
period is less than 1 MTP. The WA applies only to UHBR rates while on
non-UHBR the specification requires disabling it explicitly - presumedly
because the register's reset value has the WA enabled.

Bspec: 50050, 55424

Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240129175533.904590-3-imre.deak@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 611041a94d06f6cfd6d1224834658be7a6245e54..fc5455a55bd7a22cc4cc0d9196b390e3acab9399 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -1135,6 +1135,14 @@ static void enable_bs_jitter_was(const struct intel_crtc_state *crtc_state)
        if (crtc_state->fec_enable || intel_dp_is_uhbr(crtc_state))
                set |= DP_MST_FEC_BS_JITTER_WA(crtc_state->cpu_transcoder);
 
+       /* Wa_14014143976:adlp */
+       if (IS_DISPLAY_STEP(i915, STEP_E0, STEP_FOREVER)) {
+               if (intel_dp_is_uhbr(crtc_state))
+                       set |= DP_MST_SHORT_HBLANK_WA(crtc_state->cpu_transcoder);
+               else if (crtc_state->fec_enable)
+                       clear |= DP_MST_SHORT_HBLANK_WA(crtc_state->cpu_transcoder);
+       }
+
        if (!clear && !set)
                return;
 

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 1e8720e2516092197e0c08cb5f351ec4fe6f17c3..81eb36fa0837af30cc6f98075326aa4569031aca 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4565,6 +4565,7 @@
 #define   GLK_CL0_PWR_DOWN             REG_BIT(10)
 
 #define CHICKEN_MISC_3         _MMIO(0x42088)
+#define   DP_MST_SHORT_HBLANK_WA(trans)                REG_BIT(5 + (trans) - TRANSCODER_A)
 #define   DP_MST_FEC_BS_JITTER_WA(trans)       REG_BIT(0 + (trans) - TRANSCODER_A)
 
 #define CHICKEN_MISC_4         _MMIO(0x4208c)