riscv: hwprobe: Add SiFive vendor extension support and probe for xsfqmaccdod and...
authorCyan Yang <cyan.yang@sifive.com>
Fri, 18 Apr 2025 05:32:31 +0000 (13:32 +0800)
committerPalmer Dabbelt <palmer@rivosinc.com>
Thu, 8 May 2025 18:01:43 +0000 (11:01 -0700)
Add a new hwprobe key "RISCV_HWPROBE_KEY_VENDOR_EXT_SIFIVE_0" which allows
userspace to probe for the new vendor extensions from SiFive. Also, add
new hwprobe for SiFive "xsfvqmaccdod" and "xsfvqmaccqoq" vendor
extensions.

Signed-off-by: Cyan Yang <cyan.yang@sifive.com>
Link: https://lore.kernel.org/r/20250418053239.4351-5-cyan.yang@sifive.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
arch/riscv/include/asm/hwprobe.h
arch/riscv/include/asm/vendor_extensions/sifive_hwprobe.h [new file with mode: 0644]
arch/riscv/include/uapi/asm/vendor/sifive.h [new file with mode: 0644]
arch/riscv/kernel/sys_hwprobe.c
arch/riscv/kernel/vendor_extensions/Makefile
arch/riscv/kernel/vendor_extensions/sifive_hwprobe.c [new file with mode: 0644]

index 1c69773057765b42b8b41d2e8cb0fef1312d480f..7fe0a379474ae2c64d300d6fee4a012173f6a6d7 100644 (file)
@@ -22,6 +22,7 @@ static inline bool hwprobe_key_is_bitmask(__s64 key)
        case RISCV_HWPROBE_KEY_IMA_EXT_0:
        case RISCV_HWPROBE_KEY_CPUPERF_0:
        case RISCV_HWPROBE_KEY_VENDOR_EXT_THEAD_0:
+       case RISCV_HWPROBE_KEY_VENDOR_EXT_SIFIVE_0:
                return true;
        }
 
diff --git a/arch/riscv/include/asm/vendor_extensions/sifive_hwprobe.h b/arch/riscv/include/asm/vendor_extensions/sifive_hwprobe.h
new file mode 100644 (file)
index 0000000..90a61ab
--- /dev/null
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef _ASM_RISCV_VENDOR_EXTENSIONS_SIFIVE_HWPROBE_H
+#define _ASM_RISCV_VENDOR_EXTENSIONS_SIFIVE_HWPROBE_H
+
+#include <linux/cpumask.h>
+
+#include <uapi/asm/hwprobe.h>
+
+#ifdef CONFIG_RISCV_ISA_VENDOR_EXT_SIFIVE
+void hwprobe_isa_vendor_ext_sifive_0(struct riscv_hwprobe *pair, const struct cpumask *cpus);
+#else
+static inline void hwprobe_isa_vendor_ext_sifive_0(struct riscv_hwprobe *pair,
+                                                  const struct cpumask *cpus)
+{
+       pair->value = 0;
+}
+#endif
+
+#endif
diff --git a/arch/riscv/include/uapi/asm/vendor/sifive.h b/arch/riscv/include/uapi/asm/vendor/sifive.h
new file mode 100644 (file)
index 0000000..f25d8cf
--- /dev/null
@@ -0,0 +1,4 @@
+/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
+
+#define        RISCV_HWPROBE_VENDOR_EXT_XSFVQMACCDOD           (1 << 0)
+#define        RISCV_HWPROBE_VENDOR_EXT_XSFVQMACCQOQ           (1 << 1)
index 249aec8594a92a80159424c29e803f04c893014d..138e74f05de78eaf0fe01d0364a6905b0c4bdaeb 100644 (file)
@@ -15,6 +15,7 @@
 #include <asm/uaccess.h>
 #include <asm/unistd.h>
 #include <asm/vector.h>
+#include <asm/vendor_extensions/sifive_hwprobe.h>
 #include <asm/vendor_extensions/thead_hwprobe.h>
 #include <vdso/vsyscall.h>
 
@@ -300,6 +301,10 @@ static void hwprobe_one_pair(struct riscv_hwprobe *pair,
                pair->value = riscv_timebase;
                break;
 
+       case RISCV_HWPROBE_KEY_VENDOR_EXT_SIFIVE_0:
+               hwprobe_isa_vendor_ext_sifive_0(pair, cpus);
+               break;
+
        case RISCV_HWPROBE_KEY_VENDOR_EXT_THEAD_0:
                hwprobe_isa_vendor_ext_thead_0(pair, cpus);
                break;
index d5fdde0e863b1780b3a6f6759892654dcc478838..a4eca96d1c8a2fd165220f6439a3884cf90a9593 100644 (file)
@@ -2,5 +2,6 @@
 
 obj-$(CONFIG_RISCV_ISA_VENDOR_EXT_ANDES)       += andes.o
 obj-$(CONFIG_RISCV_ISA_VENDOR_EXT_SIFIVE)      += sifive.o
+obj-$(CONFIG_RISCV_ISA_VENDOR_EXT_SIFIVE)      += sifive_hwprobe.o
 obj-$(CONFIG_RISCV_ISA_VENDOR_EXT_THEAD)       += thead.o
 obj-$(CONFIG_RISCV_ISA_VENDOR_EXT_THEAD)       += thead_hwprobe.o
diff --git a/arch/riscv/kernel/vendor_extensions/sifive_hwprobe.c b/arch/riscv/kernel/vendor_extensions/sifive_hwprobe.c
new file mode 100644 (file)
index 0000000..461ce0f
--- /dev/null
@@ -0,0 +1,20 @@
+// SPDX-License-Identifier: GPL-2.0-only
+
+#include <asm/vendor_extensions/sifive.h>
+#include <asm/vendor_extensions/sifive_hwprobe.h>
+#include <asm/vendor_extensions/vendor_hwprobe.h>
+
+#include <linux/cpumask.h>
+#include <linux/types.h>
+
+#include <uapi/asm/hwprobe.h>
+#include <uapi/asm/vendor/sifive.h>
+
+void hwprobe_isa_vendor_ext_sifive_0(struct riscv_hwprobe *pair, const struct cpumask *cpus)
+{
+       VENDOR_EXTENSION_SUPPORTED(pair, cpus,
+                                  riscv_isa_vendor_ext_list_sifive.per_hart_isa_bitmap, {
+               VENDOR_EXT_KEY(XSFVQMACCDOD);
+               VENDOR_EXT_KEY(XSFVQMACCQOQ);
+       });
+}