drm/nouveau/dma: split user classes out from engine implementations
authorBen Skeggs <bskeggs@redhat.com>
Thu, 20 Aug 2015 04:54:18 +0000 (14:54 +1000)
committerBen Skeggs <bskeggs@redhat.com>
Fri, 28 Aug 2015 02:40:39 +0000 (12:40 +1000)
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
28 files changed:
drivers/gpu/drm/nouveau/include/nvkm/core/device.h
drivers/gpu/drm/nouveau/include/nvkm/engine/dma.h [new file with mode: 0644]
drivers/gpu/drm/nouveau/include/nvkm/engine/dmaobj.h [deleted file]
drivers/gpu/drm/nouveau/nvkm/engine/Kbuild
drivers/gpu/drm/nouveau/nvkm/engine/device/priv.h
drivers/gpu/drm/nouveau/nvkm/engine/device/user.c
drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c
drivers/gpu/drm/nouveau/nvkm/engine/dma/Kbuild [new file with mode: 0644]
drivers/gpu/drm/nouveau/nvkm/engine/dma/base.c [new file with mode: 0644]
drivers/gpu/drm/nouveau/nvkm/engine/dma/gf100.c [new file with mode: 0644]
drivers/gpu/drm/nouveau/nvkm/engine/dma/gf110.c [new file with mode: 0644]
drivers/gpu/drm/nouveau/nvkm/engine/dma/nv04.c [new file with mode: 0644]
drivers/gpu/drm/nouveau/nvkm/engine/dma/nv50.c [new file with mode: 0644]
drivers/gpu/drm/nouveau/nvkm/engine/dma/priv.h [new file with mode: 0644]
drivers/gpu/drm/nouveau/nvkm/engine/dma/user.c [new file with mode: 0644]
drivers/gpu/drm/nouveau/nvkm/engine/dma/user.h [new file with mode: 0644]
drivers/gpu/drm/nouveau/nvkm/engine/dma/usergf100.c [new file with mode: 0644]
drivers/gpu/drm/nouveau/nvkm/engine/dma/usergf110.c [new file with mode: 0644]
drivers/gpu/drm/nouveau/nvkm/engine/dma/usernv04.c [new file with mode: 0644]
drivers/gpu/drm/nouveau/nvkm/engine/dma/usernv50.c [new file with mode: 0644]
drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/Kbuild [deleted file]
drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/base.c [deleted file]
drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/gf100.c [deleted file]
drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/gf110.c [deleted file]
drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/nv04.c [deleted file]
drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/nv50.c [deleted file]
drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/priv.h [deleted file]
drivers/gpu/drm/nouveau/nvkm/engine/fifo/base.c

index 334d64dbb6413d5ea0b9640df3b120c74b1391a1..1d72d670bed275596a5d8d9bed954c461615bdfa 100644 (file)
@@ -133,7 +133,7 @@ struct nvkm_device {
        struct nvkm_engine *ce[3];
        struct nvkm_engine *cipher;
        struct nvkm_disp *disp;
-       struct nvkm_dmaeng *dma;
+       struct nvkm_dma *dma;
        struct nvkm_fifo *fifo;
        struct nvkm_gr *gr;
        struct nvkm_engine *ifb;
@@ -193,7 +193,7 @@ struct nvkm_device_chip {
        int (*ce[3]  )(struct nvkm_device *, int idx, struct nvkm_engine **);
        int (*cipher )(struct nvkm_device *, int idx, struct nvkm_engine **);
        int (*disp   )(struct nvkm_device *, int idx, struct nvkm_disp **);
-       int (*dma    )(struct nvkm_device *, int idx, struct nvkm_dmaeng **);
+       int (*dma    )(struct nvkm_device *, int idx, struct nvkm_dma **);
        int (*fifo   )(struct nvkm_device *, int idx, struct nvkm_fifo **);
        int (*gr     )(struct nvkm_device *, int idx, struct nvkm_gr **);
        int (*ifb    )(struct nvkm_device *, int idx, struct nvkm_engine **);
diff --git a/drivers/gpu/drm/nouveau/include/nvkm/engine/dma.h b/drivers/gpu/drm/nouveau/include/nvkm/engine/dma.h
new file mode 100644 (file)
index 0000000..5f461e9
--- /dev/null
@@ -0,0 +1,26 @@
+#ifndef __NVKM_DMA_H__
+#define __NVKM_DMA_H__
+#include <core/engine.h>
+struct nvkm_gpuobj;
+
+struct nvkm_dmaobj {
+       struct nvkm_object base;
+       u32 target;
+       u32 access;
+       u64 start;
+       u64 limit;
+};
+
+struct nvkm_dma {
+       struct nvkm_engine engine;
+
+       /* creates a "physical" dma object from a struct nvkm_dmaobj */
+       int (*bind)(struct nvkm_dmaobj *dmaobj, struct nvkm_gpuobj *parent,
+                   struct nvkm_gpuobj **);
+};
+
+extern struct nvkm_oclass *nv04_dmaeng_oclass;
+extern struct nvkm_oclass *nv50_dmaeng_oclass;
+extern struct nvkm_oclass *gf100_dmaeng_oclass;
+extern struct nvkm_oclass *gf110_dmaeng_oclass;
+#endif
diff --git a/drivers/gpu/drm/nouveau/include/nvkm/engine/dmaobj.h b/drivers/gpu/drm/nouveau/include/nvkm/engine/dmaobj.h
deleted file mode 100644 (file)
index 343d2d7..0000000
+++ /dev/null
@@ -1,26 +0,0 @@
-#ifndef __NVKM_DMAOBJ_H__
-#define __NVKM_DMAOBJ_H__
-#include <core/engine.h>
-struct nvkm_gpuobj;
-
-struct nvkm_dmaobj {
-       struct nvkm_object base;
-       u32 target;
-       u32 access;
-       u64 start;
-       u64 limit;
-};
-
-struct nvkm_dmaeng {
-       struct nvkm_engine engine;
-
-       /* creates a "physical" dma object from a struct nvkm_dmaobj */
-       int (*bind)(struct nvkm_dmaobj *dmaobj, struct nvkm_gpuobj *parent,
-                   struct nvkm_gpuobj **);
-};
-
-extern struct nvkm_oclass *nv04_dmaeng_oclass;
-extern struct nvkm_oclass *nv50_dmaeng_oclass;
-extern struct nvkm_oclass *gf100_dmaeng_oclass;
-extern struct nvkm_oclass *gf110_dmaeng_oclass;
-#endif
index 6bd3d756f32c981f27f9a81ab4618556c4a9b0f1..36f724763fde5f4fedded234368de4f2590ff7c0 100644 (file)
@@ -6,7 +6,7 @@ include $(src)/nvkm/engine/ce/Kbuild
 include $(src)/nvkm/engine/cipher/Kbuild
 include $(src)/nvkm/engine/device/Kbuild
 include $(src)/nvkm/engine/disp/Kbuild
-include $(src)/nvkm/engine/dmaobj/Kbuild
+include $(src)/nvkm/engine/dma/Kbuild
 include $(src)/nvkm/engine/fifo/Kbuild
 include $(src)/nvkm/engine/gr/Kbuild
 include $(src)/nvkm/engine/mpeg/Kbuild
index 76b441ddc71339530c15584dfbff02af9fdd25d2..4cf483894af0116bea88e21f35ee331e6fd1537f 100644 (file)
@@ -26,7 +26,7 @@
 #include <engine/ce.h>
 #include <engine/cipher.h>
 #include <engine/disp.h>
-#include <engine/dmaobj.h>
+#include <engine/dma.h>
 #include <engine/fifo.h>
 #include <engine/gr.h>
 #include <engine/mpeg.h>
index d9d15385d0ad9fc9cb63658fa31db5073b488bef..58a09f828b7fc29aa8ecedd0fd5d192da99ca8ca 100644 (file)
 #include <subdev/fb.h>
 #include <subdev/instmem.h>
 #include <subdev/timer.h>
-#include <engine/disp.h>
-#include <engine/dmaobj.h>
-#include <engine/fifo.h>
-#include <engine/pm.h>
 
 #include <nvif/class.h>
 #include <nvif/unpack.h>
index 8743972009dc2243d557c9cfae15598f97dd082d..12b835fee0d52bb5a76418557e92bb0a8964fbb4 100644 (file)
@@ -30,7 +30,7 @@
 #include <core/enum.h>
 #include <core/handle.h>
 #include <core/ramht.h>
-#include <engine/dmaobj.h>
+#include <engine/dma.h>
 #include <subdev/bios.h>
 #include <subdev/bios/dcb.h>
 #include <subdev/bios/disp.h>
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/dma/Kbuild b/drivers/gpu/drm/nouveau/nvkm/engine/dma/Kbuild
new file mode 100644 (file)
index 0000000..bb3a052
--- /dev/null
@@ -0,0 +1,11 @@
+nvkm-y += nvkm/engine/dma/base.o
+nvkm-y += nvkm/engine/dma/nv04.o
+nvkm-y += nvkm/engine/dma/nv50.o
+nvkm-y += nvkm/engine/dma/gf100.o
+nvkm-y += nvkm/engine/dma/gf110.o
+
+nvkm-y += nvkm/engine/dma/user.o
+nvkm-y += nvkm/engine/dma/usernv04.o
+nvkm-y += nvkm/engine/dma/usernv50.o
+nvkm-y += nvkm/engine/dma/usergf100.o
+nvkm-y += nvkm/engine/dma/usergf110.o
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/dma/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/dma/base.c
new file mode 100644 (file)
index 0000000..a48978d
--- /dev/null
@@ -0,0 +1,110 @@
+/*
+ * Copyright 2012 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs
+ */
+#include "priv.h"
+
+#include <core/client.h>
+#include <core/gpuobj.h>
+
+struct hack {
+       struct nvkm_gpuobj object;
+       struct nvkm_gpuobj *parent;
+};
+
+static void
+dtor(struct nvkm_object *object)
+{
+       struct hack *hack = (void *)object;
+       nvkm_gpuobj_del(&hack->parent);
+       nvkm_object_destroy(&hack->object.object);
+}
+
+static struct nvkm_oclass
+hack = {
+       .handle = NV_GPUOBJ_CLASS,
+       .ofuncs = &(struct nvkm_ofuncs) {
+               .dtor = dtor,
+               .init = _nvkm_object_init,
+               .fini = _nvkm_object_fini,
+       },
+};
+
+static int
+nvkm_dmaobj_bind(struct nvkm_dmaobj *dmaobj, struct nvkm_gpuobj *pargpu,
+                struct nvkm_gpuobj **pgpuobj)
+{
+       const struct nvkm_dma_impl *impl = (void *)
+               nv_oclass(nv_object(dmaobj)->engine);
+       int ret = 0;
+
+       if (&dmaobj->base == &pargpu->object) { /* ctor bind */
+               struct nvkm_object *parent = (void *)pargpu;
+               struct hack *object;
+
+               if (parent->parent->parent == &nvkm_client(parent)->object) {
+                       /* delayed, or no, binding */
+                       return 0;
+               }
+
+               pargpu = (void *)nv_pclass((void *)pargpu, NV_GPUOBJ_CLASS);
+
+               ret = nvkm_object_create(parent, NULL, &hack, NV_GPUOBJ_CLASS, &object);
+               if (ret == 0) {
+                       nvkm_object_ref(NULL, &parent);
+                       *pgpuobj = &object->object;
+
+                       ret = impl->bind(dmaobj, pargpu, &object->parent);
+                       if (ret)
+                               return ret;
+
+                       object->object.node = object->parent->node;
+                       object->object.addr = object->parent->addr;
+                       object->object.size = object->parent->size;
+                       return 0;
+               }
+
+               return ret;
+       }
+
+       return impl->bind(dmaobj, pargpu, pgpuobj);
+}
+
+int
+_nvkm_dma_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
+                 struct nvkm_oclass *oclass, void *data, u32 size,
+                 struct nvkm_object **pobject)
+{
+       const struct nvkm_dma_impl *impl = (void *)oclass;
+       struct nvkm_dma *dmaeng;
+       int ret;
+
+       ret = nvkm_engine_create(parent, engine, oclass, true, "DMAOBJ",
+                                "dmaobj", &dmaeng);
+       *pobject = nv_object(dmaeng);
+       if (ret)
+               return ret;
+
+       nv_engine(dmaeng)->sclass = impl->sclass;
+       dmaeng->bind = nvkm_dmaobj_bind;
+       return 0;
+}
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/dma/gf100.c b/drivers/gpu/drm/nouveau/nvkm/engine/dma/gf100.c
new file mode 100644 (file)
index 0000000..cb5c6ad
--- /dev/null
@@ -0,0 +1,38 @@
+/*
+ * Copyright 2012 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs
+ */
+#include "priv.h"
+#include "user.h"
+
+struct nvkm_oclass *
+gf100_dmaeng_oclass = &(struct nvkm_dma_impl) {
+       .base.handle = NV_ENGINE(DMAOBJ, 0xc0),
+       .base.ofuncs = &(struct nvkm_ofuncs) {
+               .ctor = _nvkm_dma_ctor,
+               .dtor = _nvkm_dma_dtor,
+               .init = _nvkm_dma_init,
+               .fini = _nvkm_dma_fini,
+       },
+       .sclass = gf100_dmaeng_sclass,
+       .bind = gf100_dmaobj_bind,
+}.base;
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/dma/gf110.c b/drivers/gpu/drm/nouveau/nvkm/engine/dma/gf110.c
new file mode 100644 (file)
index 0000000..9a93ec6
--- /dev/null
@@ -0,0 +1,38 @@
+/*
+ * Copyright 2012 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs
+ */
+#include "priv.h"
+#include "user.h"
+
+struct nvkm_oclass *
+gf110_dmaeng_oclass = &(struct nvkm_dma_impl) {
+       .base.handle = NV_ENGINE(DMAOBJ, 0xd0),
+       .base.ofuncs = &(struct nvkm_ofuncs) {
+               .ctor = _nvkm_dma_ctor,
+               .dtor = _nvkm_dma_dtor,
+               .init = _nvkm_dma_init,
+               .fini = _nvkm_dma_fini,
+       },
+       .sclass = gf110_dmaeng_sclass,
+       .bind = gf110_dmaobj_bind,
+}.base;
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/dma/nv04.c b/drivers/gpu/drm/nouveau/nvkm/engine/dma/nv04.c
new file mode 100644 (file)
index 0000000..32bccdc
--- /dev/null
@@ -0,0 +1,38 @@
+/*
+ * Copyright 2012 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs
+ */
+#include "priv.h"
+#include "user.h"
+
+struct nvkm_oclass *
+nv04_dmaeng_oclass = &(struct nvkm_dma_impl) {
+       .base.handle = NV_ENGINE(DMAOBJ, 0x04),
+       .base.ofuncs = &(struct nvkm_ofuncs) {
+               .ctor = _nvkm_dma_ctor,
+               .dtor = _nvkm_dma_dtor,
+               .init = _nvkm_dma_init,
+               .fini = _nvkm_dma_fini,
+       },
+       .sclass = nv04_dmaeng_sclass,
+       .bind = nv04_dmaobj_bind,
+}.base;
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/dma/nv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/dma/nv50.c
new file mode 100644 (file)
index 0000000..20346d6
--- /dev/null
@@ -0,0 +1,38 @@
+/*
+ * Copyright 2012 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs
+ */
+#include "priv.h"
+#include "user.h"
+
+struct nvkm_oclass *
+nv50_dmaeng_oclass = &(struct nvkm_dma_impl) {
+       .base.handle = NV_ENGINE(DMAOBJ, 0x50),
+       .base.ofuncs = &(struct nvkm_ofuncs) {
+               .ctor = _nvkm_dma_ctor,
+               .dtor = _nvkm_dma_dtor,
+               .init = _nvkm_dma_init,
+               .fini = _nvkm_dma_fini,
+       },
+       .sclass = nv50_dmaeng_sclass,
+       .bind = nv50_dmaobj_bind,
+}.base;
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/dma/priv.h b/drivers/gpu/drm/nouveau/nvkm/engine/dma/priv.h
new file mode 100644 (file)
index 0000000..fb2f7ec
--- /dev/null
@@ -0,0 +1,18 @@
+#ifndef __NVKM_DMA_PRIV_H__
+#define __NVKM_DMA_PRIV_H__
+#include <engine/dma.h>
+
+int _nvkm_dma_ctor(struct nvkm_object *, struct nvkm_object *,
+                     struct nvkm_oclass *, void *, u32,
+                     struct nvkm_object **);
+#define _nvkm_dma_dtor _nvkm_engine_dtor
+#define _nvkm_dma_init _nvkm_engine_init
+#define _nvkm_dma_fini _nvkm_engine_fini
+
+struct nvkm_dma_impl {
+       struct nvkm_oclass base;
+       struct nvkm_oclass *sclass;
+       int (*bind)(struct nvkm_dmaobj *, struct nvkm_gpuobj *,
+                   struct nvkm_gpuobj **);
+};
+#endif
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/dma/user.c b/drivers/gpu/drm/nouveau/nvkm/engine/dma/user.c
new file mode 100644 (file)
index 0000000..11571db
--- /dev/null
@@ -0,0 +1,121 @@
+/*
+ * Copyright 2012 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs
+ */
+#include "user.h"
+
+#include <core/client.h>
+#include <subdev/fb.h>
+#include <subdev/instmem.h>
+
+#include <nvif/class.h>
+#include <nvif/unpack.h>
+
+int
+nvkm_dmaobj_create_(struct nvkm_object *parent,
+                   struct nvkm_object *engine,
+                   struct nvkm_oclass *oclass, void **pdata, u32 *psize,
+                   int length, void **pobject)
+{
+       union {
+               struct nv_dma_v0 v0;
+       } *args = *pdata;
+       struct nvkm_instmem *instmem = nvkm_instmem(parent);
+       struct nvkm_client *client = nvkm_client(parent);
+       struct nvkm_device *device = nv_device(parent);
+       struct nvkm_fb *fb = nvkm_fb(parent);
+       struct nvkm_dmaobj *dmaobj;
+       void *data = *pdata;
+       u32 size = *psize;
+       int ret;
+
+       ret = nvkm_object_create_(parent, engine, oclass, 0, length, pobject);
+       dmaobj = *pobject;
+       if (ret)
+               return ret;
+
+       nvif_ioctl(parent, "create dma size %d\n", *psize);
+       if (nvif_unpack(args->v0, 0, 0, true)) {
+               nvif_ioctl(parent, "create dma vers %d target %d access %d "
+                                  "start %016llx limit %016llx\n",
+                          args->v0.version, args->v0.target, args->v0.access,
+                          args->v0.start, args->v0.limit);
+               dmaobj->target = args->v0.target;
+               dmaobj->access = args->v0.access;
+               dmaobj->start  = args->v0.start;
+               dmaobj->limit  = args->v0.limit;
+       } else
+               return ret;
+
+       *pdata = data;
+       *psize = size;
+
+       if (dmaobj->start > dmaobj->limit)
+               return -EINVAL;
+
+       switch (dmaobj->target) {
+       case NV_DMA_V0_TARGET_VM:
+               dmaobj->target = NV_MEM_TARGET_VM;
+               break;
+       case NV_DMA_V0_TARGET_VRAM:
+               if (!client->super) {
+                       if (dmaobj->limit >= fb->ram->size - instmem->reserved)
+                               return -EACCES;
+                       if (device->card_type >= NV_50)
+                               return -EACCES;
+               }
+               dmaobj->target = NV_MEM_TARGET_VRAM;
+               break;
+       case NV_DMA_V0_TARGET_PCI:
+               if (!client->super)
+                       return -EACCES;
+               dmaobj->target = NV_MEM_TARGET_PCI;
+               break;
+       case NV_DMA_V0_TARGET_PCI_US:
+       case NV_DMA_V0_TARGET_AGP:
+               if (!client->super)
+                       return -EACCES;
+               dmaobj->target = NV_MEM_TARGET_PCI_NOSNOOP;
+               break;
+       default:
+               return -EINVAL;
+       }
+
+       switch (dmaobj->access) {
+       case NV_DMA_V0_ACCESS_VM:
+               dmaobj->access = NV_MEM_ACCESS_VM;
+               break;
+       case NV_DMA_V0_ACCESS_RD:
+               dmaobj->access = NV_MEM_ACCESS_RO;
+               break;
+       case NV_DMA_V0_ACCESS_WR:
+               dmaobj->access = NV_MEM_ACCESS_WO;
+               break;
+       case NV_DMA_V0_ACCESS_RDWR:
+               dmaobj->access = NV_MEM_ACCESS_RW;
+               break;
+       default:
+               return -EINVAL;
+       }
+
+       return ret;
+}
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/dma/user.h b/drivers/gpu/drm/nouveau/nvkm/engine/dma/user.h
new file mode 100644 (file)
index 0000000..83dc1d6
--- /dev/null
@@ -0,0 +1,29 @@
+#ifndef __NVKM_DMA_USER_H__
+#define __NVKM_DMA_USER_H__
+#include "priv.h"
+
+#define nvkm_dmaobj_create(p,e,c,pa,sa,d)                                      \
+       nvkm_dmaobj_create_((p), (e), (c), (pa), (sa), sizeof(**d), (void **)d)
+
+int nvkm_dmaobj_create_(struct nvkm_object *, struct nvkm_object *,
+                       struct nvkm_oclass *, void **, u32 *,
+                       int, void **);
+#define _nvkm_dmaobj_dtor nvkm_object_destroy
+#define _nvkm_dmaobj_init _nvkm_object_init
+#define _nvkm_dmaobj_fini _nvkm_object_fini
+
+extern struct nvkm_oclass nv04_dmaeng_sclass[];
+extern struct nvkm_oclass nv50_dmaeng_sclass[];
+extern struct nvkm_oclass gf100_dmaeng_sclass[];
+extern struct nvkm_oclass gf110_dmaeng_sclass[];
+
+int nv04_dmaobj_bind(struct nvkm_dmaobj *, struct nvkm_gpuobj *,
+                    struct nvkm_gpuobj **);
+int nv50_dmaobj_bind(struct nvkm_dmaobj *, struct nvkm_gpuobj *,
+                    struct nvkm_gpuobj **);
+int gf100_dmaobj_bind(struct nvkm_dmaobj *, struct nvkm_gpuobj *,
+                     struct nvkm_gpuobj **);
+int gf110_dmaobj_bind(struct nvkm_dmaobj *, struct nvkm_gpuobj *,
+                     struct nvkm_gpuobj **);
+
+#endif
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/dma/usergf100.c b/drivers/gpu/drm/nouveau/nvkm/engine/dma/usergf100.c
new file mode 100644 (file)
index 0000000..3f2d7d9
--- /dev/null
@@ -0,0 +1,155 @@
+/*
+ * Copyright 2012 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs
+ */
+#include "user.h"
+
+#include <core/client.h>
+#include <core/gpuobj.h>
+#include <subdev/fb.h>
+
+#include <nvif/class.h>
+#include <nvif/unpack.h>
+
+struct gf100_dmaobj {
+       struct nvkm_dmaobj base;
+       u32 flags0;
+       u32 flags5;
+};
+
+int
+gf100_dmaobj_bind(struct nvkm_dmaobj *obj, struct nvkm_gpuobj *parent,
+                 struct nvkm_gpuobj **pgpuobj)
+{
+       struct gf100_dmaobj *dmaobj = container_of(obj, typeof(*dmaobj), base);
+       struct nvkm_device *device = dmaobj->base.base.engine->subdev.device;
+       int ret;
+
+       ret = nvkm_gpuobj_new(device, 24, 32, false, parent, pgpuobj);
+       if (ret == 0) {
+               nvkm_kmap(*pgpuobj);
+               nvkm_wo32(*pgpuobj, 0x00, dmaobj->flags0 | nv_mclass(dmaobj));
+               nvkm_wo32(*pgpuobj, 0x04, lower_32_bits(dmaobj->base.limit));
+               nvkm_wo32(*pgpuobj, 0x08, lower_32_bits(dmaobj->base.start));
+               nvkm_wo32(*pgpuobj, 0x0c, upper_32_bits(dmaobj->base.limit) << 24 |
+                                         upper_32_bits(dmaobj->base.start));
+               nvkm_wo32(*pgpuobj, 0x10, 0x00000000);
+               nvkm_wo32(*pgpuobj, 0x14, dmaobj->flags5);
+               nvkm_done(*pgpuobj);
+       }
+
+       return ret;
+}
+
+static int
+gf100_dmaobj_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
+                 struct nvkm_oclass *oclass, void *data, u32 size,
+                 struct nvkm_object **pobject)
+{
+       struct nvkm_dma *dmaeng = (void *)engine;
+       union {
+               struct gf100_dma_v0 v0;
+       } *args;
+       struct gf100_dmaobj *dmaobj;
+       u32 kind, user, unkn;
+       int ret;
+
+       ret = nvkm_dmaobj_create(parent, engine, oclass, &data, &size, &dmaobj);
+       *pobject = nv_object(dmaobj);
+       if (ret)
+               return ret;
+       args = data;
+
+       nvif_ioctl(parent, "create gf100 dma size %d\n", size);
+       if (nvif_unpack(args->v0, 0, 0, false)) {
+               nvif_ioctl(parent,
+                          "create gf100 dma vers %d priv %d kind %02x\n",
+                          args->v0.version, args->v0.priv, args->v0.kind);
+               kind = args->v0.kind;
+               user = args->v0.priv;
+               unkn = 0;
+       } else
+       if (size == 0) {
+               if (dmaobj->base.target != NV_MEM_TARGET_VM) {
+                       kind = GF100_DMA_V0_KIND_PITCH;
+                       user = GF100_DMA_V0_PRIV_US;
+                       unkn = 2;
+               } else {
+                       kind = GF100_DMA_V0_KIND_VM;
+                       user = GF100_DMA_V0_PRIV_VM;
+                       unkn = 0;
+               }
+       } else
+               return ret;
+
+       if (user > 2)
+               return -EINVAL;
+       dmaobj->flags0 |= (kind << 22) | (user << 20);
+       dmaobj->flags5 |= (unkn << 16);
+
+       switch (dmaobj->base.target) {
+       case NV_MEM_TARGET_VM:
+               dmaobj->flags0 |= 0x00000000;
+               break;
+       case NV_MEM_TARGET_VRAM:
+               dmaobj->flags0 |= 0x00010000;
+               break;
+       case NV_MEM_TARGET_PCI:
+               dmaobj->flags0 |= 0x00020000;
+               break;
+       case NV_MEM_TARGET_PCI_NOSNOOP:
+               dmaobj->flags0 |= 0x00030000;
+               break;
+       default:
+               return -EINVAL;
+       }
+
+       switch (dmaobj->base.access) {
+       case NV_MEM_ACCESS_VM:
+               break;
+       case NV_MEM_ACCESS_RO:
+               dmaobj->flags0 |= 0x00040000;
+               break;
+       case NV_MEM_ACCESS_WO:
+       case NV_MEM_ACCESS_RW:
+               dmaobj->flags0 |= 0x00080000;
+               break;
+       }
+
+       return dmaeng->bind(&dmaobj->base, (void *)dmaobj, (void *)pobject);
+}
+
+static struct nvkm_ofuncs
+gf100_dmaobj_ofuncs = {
+       .ctor =  gf100_dmaobj_ctor,
+       .dtor = _nvkm_dmaobj_dtor,
+       .init = _nvkm_dmaobj_init,
+       .fini = _nvkm_dmaobj_fini,
+};
+
+struct nvkm_oclass
+gf100_dmaeng_sclass[] = {
+       { NV_DMA_FROM_MEMORY, &gf100_dmaobj_ofuncs },
+       { NV_DMA_TO_MEMORY, &gf100_dmaobj_ofuncs },
+       { NV_DMA_IN_MEMORY, &gf100_dmaobj_ofuncs },
+       {}
+};
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/dma/usergf110.c b/drivers/gpu/drm/nouveau/nvkm/engine/dma/usergf110.c
new file mode 100644 (file)
index 0000000..db22a8b
--- /dev/null
@@ -0,0 +1,137 @@
+/*
+ * Copyright 2012 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs
+ */
+#include "user.h"
+
+#include <core/client.h>
+#include <core/gpuobj.h>
+#include <subdev/fb.h>
+
+#include <nvif/class.h>
+#include <nvif/unpack.h>
+
+struct gf110_dmaobj {
+       struct nvkm_dmaobj base;
+       u32 flags0;
+};
+
+int
+gf110_dmaobj_bind(struct nvkm_dmaobj *obj, struct nvkm_gpuobj *parent,
+                 struct nvkm_gpuobj **pgpuobj)
+{
+       struct gf110_dmaobj *dmaobj = container_of(obj, typeof(*dmaobj), base);
+       struct nvkm_device *device = dmaobj->base.base.engine->subdev.device;
+       int ret;
+
+       ret = nvkm_gpuobj_new(device, 24, 32, false, parent, pgpuobj);
+       if (ret == 0) {
+               nvkm_kmap(*pgpuobj);
+               nvkm_wo32(*pgpuobj, 0x00, dmaobj->flags0);
+               nvkm_wo32(*pgpuobj, 0x04, dmaobj->base.start >> 8);
+               nvkm_wo32(*pgpuobj, 0x08, dmaobj->base.limit >> 8);
+               nvkm_wo32(*pgpuobj, 0x0c, 0x00000000);
+               nvkm_wo32(*pgpuobj, 0x10, 0x00000000);
+               nvkm_wo32(*pgpuobj, 0x14, 0x00000000);
+               nvkm_done(*pgpuobj);
+       }
+
+       return ret;
+}
+
+static int
+gf110_dmaobj_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
+                 struct nvkm_oclass *oclass, void *data, u32 size,
+                 struct nvkm_object **pobject)
+{
+       struct nvkm_dma *dmaeng = (void *)engine;
+       union {
+               struct gf110_dma_v0 v0;
+       } *args;
+       struct gf110_dmaobj *dmaobj;
+       u32 kind, page;
+       int ret;
+
+       ret = nvkm_dmaobj_create(parent, engine, oclass, &data, &size, &dmaobj);
+       *pobject = nv_object(dmaobj);
+       if (ret)
+               return ret;
+       args = data;
+
+       nvif_ioctl(parent, "create gf110 dma size %d\n", size);
+       if (nvif_unpack(args->v0, 0, 0, false)) {
+               nvif_ioctl(parent,
+                          "create gf100 dma vers %d page %d kind %02x\n",
+                          args->v0.version, args->v0.page, args->v0.kind);
+               kind = args->v0.kind;
+               page = args->v0.page;
+       } else
+       if (size == 0) {
+               if (dmaobj->base.target != NV_MEM_TARGET_VM) {
+                       kind = GF110_DMA_V0_KIND_PITCH;
+                       page = GF110_DMA_V0_PAGE_SP;
+               } else {
+                       kind = GF110_DMA_V0_KIND_VM;
+                       page = GF110_DMA_V0_PAGE_LP;
+               }
+       } else
+               return ret;
+
+       if (page > 1)
+               return -EINVAL;
+       dmaobj->flags0 = (kind << 20) | (page << 6);
+
+       switch (dmaobj->base.target) {
+       case NV_MEM_TARGET_VRAM:
+               dmaobj->flags0 |= 0x00000009;
+               break;
+       case NV_MEM_TARGET_VM:
+       case NV_MEM_TARGET_PCI:
+       case NV_MEM_TARGET_PCI_NOSNOOP:
+               /* XXX: don't currently know how to construct a real one
+                *      of these.  we only use them to represent pushbufs
+                *      on these chipsets, and the classes that use them
+                *      deal with the target themselves.
+                */
+               break;
+       default:
+               return -EINVAL;
+       }
+
+       return dmaeng->bind(&dmaobj->base, (void *)dmaobj, (void *)pobject);
+}
+
+static struct nvkm_ofuncs
+gf110_dmaobj_ofuncs = {
+       .ctor =  gf110_dmaobj_ctor,
+       .dtor = _nvkm_dmaobj_dtor,
+       .init = _nvkm_dmaobj_init,
+       .fini = _nvkm_dmaobj_fini,
+};
+
+struct nvkm_oclass
+gf110_dmaeng_sclass[] = {
+       { NV_DMA_FROM_MEMORY, &gf110_dmaobj_ofuncs },
+       { NV_DMA_TO_MEMORY, &gf110_dmaobj_ofuncs },
+       { NV_DMA_IN_MEMORY, &gf110_dmaobj_ofuncs },
+       {}
+};
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/dma/usernv04.c b/drivers/gpu/drm/nouveau/nvkm/engine/dma/usernv04.c
new file mode 100644 (file)
index 0000000..bd8ca8e
--- /dev/null
@@ -0,0 +1,141 @@
+/*
+ * Copyright 2012 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs
+ */
+#include "user.h"
+
+#include <core/gpuobj.h>
+#include <subdev/fb.h>
+#include <subdev/mmu/nv04.h>
+
+#include <nvif/class.h>
+
+struct nv04_dmaobj {
+       struct nvkm_dmaobj base;
+       bool clone;
+       u32 flags0;
+       u32 flags2;
+};
+
+int
+nv04_dmaobj_bind(struct nvkm_dmaobj *obj, struct nvkm_gpuobj *parent,
+                struct nvkm_gpuobj **pgpuobj)
+{
+       struct nv04_dmaobj *dmaobj = container_of(obj, typeof(*dmaobj), base);
+       struct nvkm_device *device = dmaobj->base.base.engine->subdev.device;
+       u64 offset = dmaobj->base.start & 0xfffff000;
+       u64 adjust = dmaobj->base.start & 0x00000fff;
+       u32 length = dmaobj->base.limit - dmaobj->base.start;
+       int ret;
+
+       if (dmaobj->clone) {
+               struct nv04_mmu *mmu = nv04_mmu(dmaobj);
+               struct nvkm_memory *pgt = mmu->vm->pgt[0].mem[0];
+               if (!dmaobj->base.start)
+                       return nvkm_gpuobj_wrap(pgt, pgpuobj);
+               nvkm_kmap(pgt);
+               offset  = nvkm_ro32(pgt, 8 + (offset >> 10));
+               offset &= 0xfffff000;
+               nvkm_done(pgt);
+       }
+
+       ret = nvkm_gpuobj_new(device, 16, 16, false, parent, pgpuobj);
+       if (ret == 0) {
+               nvkm_kmap(*pgpuobj);
+               nvkm_wo32(*pgpuobj, 0x00, dmaobj->flags0 | (adjust << 20));
+               nvkm_wo32(*pgpuobj, 0x04, length);
+               nvkm_wo32(*pgpuobj, 0x08, dmaobj->flags2 | offset);
+               nvkm_wo32(*pgpuobj, 0x0c, dmaobj->flags2 | offset);
+               nvkm_done(*pgpuobj);
+       }
+
+       return ret;
+}
+
+static int
+nv04_dmaobj_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
+                struct nvkm_oclass *oclass, void *data, u32 size,
+                struct nvkm_object **pobject)
+{
+       struct nvkm_dma *dmaeng = (void *)engine;
+       struct nv04_mmu *mmu = nv04_mmu(engine);
+       struct nv04_dmaobj *dmaobj;
+       int ret;
+
+       ret = nvkm_dmaobj_create(parent, engine, oclass, &data, &size, &dmaobj);
+       *pobject = nv_object(dmaobj);
+       if (ret || (ret = -ENOSYS, size))
+               return ret;
+
+       if (dmaobj->base.target == NV_MEM_TARGET_VM) {
+               if (nv_object(mmu)->oclass == &nv04_mmu_oclass)
+                       dmaobj->clone = true;
+               dmaobj->base.target = NV_MEM_TARGET_PCI;
+               dmaobj->base.access = NV_MEM_ACCESS_RW;
+       }
+
+       dmaobj->flags0 = nv_mclass(dmaobj);
+       switch (dmaobj->base.target) {
+       case NV_MEM_TARGET_VRAM:
+               dmaobj->flags0 |= 0x00003000;
+               break;
+       case NV_MEM_TARGET_PCI:
+               dmaobj->flags0 |= 0x00023000;
+               break;
+       case NV_MEM_TARGET_PCI_NOSNOOP:
+               dmaobj->flags0 |= 0x00033000;
+               break;
+       default:
+               return -EINVAL;
+       }
+
+       switch (dmaobj->base.access) {
+       case NV_MEM_ACCESS_RO:
+               dmaobj->flags0 |= 0x00004000;
+               break;
+       case NV_MEM_ACCESS_WO:
+               dmaobj->flags0 |= 0x00008000;
+       case NV_MEM_ACCESS_RW:
+               dmaobj->flags2 |= 0x00000002;
+               break;
+       default:
+               return -EINVAL;
+       }
+
+       return dmaeng->bind(&dmaobj->base, (void *)dmaobj, (void *)pobject);
+}
+
+static struct nvkm_ofuncs
+nv04_dmaobj_ofuncs = {
+       .ctor =  nv04_dmaobj_ctor,
+       .dtor = _nvkm_dmaobj_dtor,
+       .init = _nvkm_dmaobj_init,
+       .fini = _nvkm_dmaobj_fini,
+};
+
+struct nvkm_oclass
+nv04_dmaeng_sclass[] = {
+       { NV_DMA_FROM_MEMORY, &nv04_dmaobj_ofuncs },
+       { NV_DMA_TO_MEMORY, &nv04_dmaobj_ofuncs },
+       { NV_DMA_IN_MEMORY, &nv04_dmaobj_ofuncs },
+       {}
+};
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/dma/usernv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/dma/usernv50.c
new file mode 100644 (file)
index 0000000..fd99b1e
--- /dev/null
@@ -0,0 +1,161 @@
+/*
+ * Copyright 2012 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs
+ */
+#include "user.h"
+
+#include <core/client.h>
+#include <core/gpuobj.h>
+#include <subdev/fb.h>
+
+#include <nvif/class.h>
+#include <nvif/unpack.h>
+
+struct nv50_dmaobj {
+       struct nvkm_dmaobj base;
+       u32 flags0;
+       u32 flags5;
+};
+
+int
+nv50_dmaobj_bind(struct nvkm_dmaobj *obj, struct nvkm_gpuobj *parent,
+                struct nvkm_gpuobj **pgpuobj)
+{
+       struct nv50_dmaobj *dmaobj = container_of(obj, typeof(*dmaobj), base);
+       struct nvkm_device *device = dmaobj->base.base.engine->subdev.device;
+       int ret;
+
+       ret = nvkm_gpuobj_new(device, 24, 32, false, parent, pgpuobj);
+       if (ret == 0) {
+               nvkm_kmap(*pgpuobj);
+               nvkm_wo32(*pgpuobj, 0x00, dmaobj->flags0 | nv_mclass(dmaobj));
+               nvkm_wo32(*pgpuobj, 0x04, lower_32_bits(dmaobj->base.limit));
+               nvkm_wo32(*pgpuobj, 0x08, lower_32_bits(dmaobj->base.start));
+               nvkm_wo32(*pgpuobj, 0x0c, upper_32_bits(dmaobj->base.limit) << 24 |
+                                         upper_32_bits(dmaobj->base.start));
+               nvkm_wo32(*pgpuobj, 0x10, 0x00000000);
+               nvkm_wo32(*pgpuobj, 0x14, dmaobj->flags5);
+               nvkm_done(*pgpuobj);
+       }
+
+       return ret;
+}
+
+static int
+nv50_dmaobj_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
+                struct nvkm_oclass *oclass, void *data, u32 size,
+                struct nvkm_object **pobject)
+{
+       struct nvkm_dma *dmaeng = (void *)engine;
+       union {
+               struct nv50_dma_v0 v0;
+       } *args;
+       struct nv50_dmaobj *dmaobj;
+       u32 user, part, comp, kind;
+       int ret;
+
+       ret = nvkm_dmaobj_create(parent, engine, oclass, &data, &size, &dmaobj);
+       *pobject = nv_object(dmaobj);
+       if (ret)
+               return ret;
+       args = data;
+
+       nvif_ioctl(parent, "create nv50 dma size %d\n", size);
+       if (nvif_unpack(args->v0, 0, 0, false)) {
+               nvif_ioctl(parent, "create nv50 dma vers %d priv %d part %d "
+                                  "comp %d kind %02x\n", args->v0.version,
+                          args->v0.priv, args->v0.part, args->v0.comp,
+                          args->v0.kind);
+               user = args->v0.priv;
+               part = args->v0.part;
+               comp = args->v0.comp;
+               kind = args->v0.kind;
+       } else
+       if (size == 0) {
+               if (dmaobj->base.target != NV_MEM_TARGET_VM) {
+                       user = NV50_DMA_V0_PRIV_US;
+                       part = NV50_DMA_V0_PART_256;
+                       comp = NV50_DMA_V0_COMP_NONE;
+                       kind = NV50_DMA_V0_KIND_PITCH;
+               } else {
+                       user = NV50_DMA_V0_PRIV_VM;
+                       part = NV50_DMA_V0_PART_VM;
+                       comp = NV50_DMA_V0_COMP_VM;
+                       kind = NV50_DMA_V0_KIND_VM;
+               }
+       } else
+               return ret;
+
+       if (user > 2 || part > 2 || comp > 3 || kind > 0x7f)
+               return -EINVAL;
+       dmaobj->flags0 = (comp << 29) | (kind << 22) | (user << 20);
+       dmaobj->flags5 = (part << 16);
+
+       switch (dmaobj->base.target) {
+       case NV_MEM_TARGET_VM:
+               dmaobj->flags0 |= 0x00000000;
+               break;
+       case NV_MEM_TARGET_VRAM:
+               dmaobj->flags0 |= 0x00010000;
+               break;
+       case NV_MEM_TARGET_PCI:
+               dmaobj->flags0 |= 0x00020000;
+               break;
+       case NV_MEM_TARGET_PCI_NOSNOOP:
+               dmaobj->flags0 |= 0x00030000;
+               break;
+       default:
+               return -EINVAL;
+       }
+
+       switch (dmaobj->base.access) {
+       case NV_MEM_ACCESS_VM:
+               break;
+       case NV_MEM_ACCESS_RO:
+               dmaobj->flags0 |= 0x00040000;
+               break;
+       case NV_MEM_ACCESS_WO:
+       case NV_MEM_ACCESS_RW:
+               dmaobj->flags0 |= 0x00080000;
+               break;
+       default:
+               return -EINVAL;
+       }
+
+       return dmaeng->bind(&dmaobj->base, (void *)dmaobj, (void *)pobject);
+}
+
+static struct nvkm_ofuncs
+nv50_dmaobj_ofuncs = {
+       .ctor =  nv50_dmaobj_ctor,
+       .dtor = _nvkm_dmaobj_dtor,
+       .init = _nvkm_dmaobj_init,
+       .fini = _nvkm_dmaobj_fini,
+};
+
+struct nvkm_oclass
+nv50_dmaeng_sclass[] = {
+       { NV_DMA_FROM_MEMORY, &nv50_dmaobj_ofuncs },
+       { NV_DMA_TO_MEMORY, &nv50_dmaobj_ofuncs },
+       { NV_DMA_IN_MEMORY, &nv50_dmaobj_ofuncs },
+       {}
+};
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/Kbuild b/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/Kbuild
deleted file mode 100644 (file)
index 7529632..0000000
+++ /dev/null
@@ -1,5 +0,0 @@
-nvkm-y += nvkm/engine/dmaobj/base.o
-nvkm-y += nvkm/engine/dmaobj/nv04.o
-nvkm-y += nvkm/engine/dmaobj/nv50.o
-nvkm-y += nvkm/engine/dmaobj/gf100.o
-nvkm-y += nvkm/engine/dmaobj/gf110.o
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/base.c
deleted file mode 100644 (file)
index 62f6273..0000000
+++ /dev/null
@@ -1,205 +0,0 @@
-/*
- * Copyright 2012 Red Hat Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors: Ben Skeggs
- */
-#include "priv.h"
-
-#include <core/client.h>
-#include <core/gpuobj.h>
-#include <subdev/fb.h>
-#include <subdev/instmem.h>
-
-#include <nvif/class.h>
-#include <nvif/unpack.h>
-
-struct hack {
-       struct nvkm_gpuobj object;
-       struct nvkm_gpuobj *parent;
-};
-
-static void
-dtor(struct nvkm_object *object)
-{
-       struct hack *hack = (void *)object;
-       nvkm_gpuobj_del(&hack->parent);
-       nvkm_object_destroy(&hack->object.object);
-}
-
-static struct nvkm_oclass
-hack = {
-       .handle = NV_GPUOBJ_CLASS,
-       .ofuncs = &(struct nvkm_ofuncs) {
-               .dtor = dtor,
-               .init = _nvkm_object_init,
-               .fini = _nvkm_object_fini,
-       },
-};
-
-static int
-nvkm_dmaobj_bind(struct nvkm_dmaobj *dmaobj, struct nvkm_gpuobj *pargpu,
-                struct nvkm_gpuobj **pgpuobj)
-{
-       const struct nvkm_dmaeng_impl *impl = (void *)
-               nv_oclass(nv_object(dmaobj)->engine);
-       int ret = 0;
-
-       if (&dmaobj->base == &pargpu->object) { /* ctor bind */
-               struct nvkm_object *parent = (void *)pargpu;
-               struct hack *object;
-
-               if (parent->parent->parent == &nvkm_client(parent)->object) {
-                       /* delayed, or no, binding */
-                       return 0;
-               }
-
-               pargpu = (void *)nv_pclass((void *)pargpu, NV_GPUOBJ_CLASS);
-
-               ret = nvkm_object_create(parent, NULL, &hack, NV_GPUOBJ_CLASS, &object);
-               if (ret == 0) {
-                       nvkm_object_ref(NULL, &parent);
-                       *pgpuobj = &object->object;
-
-                       ret = impl->bind(dmaobj, pargpu, &object->parent);
-                       if (ret)
-                               return ret;
-
-                       object->object.node = object->parent->node;
-                       object->object.addr = object->parent->addr;
-                       object->object.size = object->parent->size;
-                       return 0;
-               }
-
-               return ret;
-       }
-
-       return impl->bind(dmaobj, pargpu, pgpuobj);
-}
-
-int
-nvkm_dmaobj_create_(struct nvkm_object *parent,
-                   struct nvkm_object *engine,
-                   struct nvkm_oclass *oclass, void **pdata, u32 *psize,
-                   int length, void **pobject)
-{
-       union {
-               struct nv_dma_v0 v0;
-       } *args = *pdata;
-       struct nvkm_instmem *instmem = nvkm_instmem(parent);
-       struct nvkm_client *client = nvkm_client(parent);
-       struct nvkm_device *device = nv_device(parent);
-       struct nvkm_fb *fb = nvkm_fb(parent);
-       struct nvkm_dmaobj *dmaobj;
-       void *data = *pdata;
-       u32 size = *psize;
-       int ret;
-
-       ret = nvkm_object_create_(parent, engine, oclass, 0, length, pobject);
-       dmaobj = *pobject;
-       if (ret)
-               return ret;
-
-       nvif_ioctl(parent, "create dma size %d\n", *psize);
-       if (nvif_unpack(args->v0, 0, 0, true)) {
-               nvif_ioctl(parent, "create dma vers %d target %d access %d "
-                                  "start %016llx limit %016llx\n",
-                          args->v0.version, args->v0.target, args->v0.access,
-                          args->v0.start, args->v0.limit);
-               dmaobj->target = args->v0.target;
-               dmaobj->access = args->v0.access;
-               dmaobj->start  = args->v0.start;
-               dmaobj->limit  = args->v0.limit;
-       } else
-               return ret;
-
-       *pdata = data;
-       *psize = size;
-
-       if (dmaobj->start > dmaobj->limit)
-               return -EINVAL;
-
-       switch (dmaobj->target) {
-       case NV_DMA_V0_TARGET_VM:
-               dmaobj->target = NV_MEM_TARGET_VM;
-               break;
-       case NV_DMA_V0_TARGET_VRAM:
-               if (!client->super) {
-                       if (dmaobj->limit >= fb->ram->size - instmem->reserved)
-                               return -EACCES;
-                       if (device->card_type >= NV_50)
-                               return -EACCES;
-               }
-               dmaobj->target = NV_MEM_TARGET_VRAM;
-               break;
-       case NV_DMA_V0_TARGET_PCI:
-               if (!client->super)
-                       return -EACCES;
-               dmaobj->target = NV_MEM_TARGET_PCI;
-               break;
-       case NV_DMA_V0_TARGET_PCI_US:
-       case NV_DMA_V0_TARGET_AGP:
-               if (!client->super)
-                       return -EACCES;
-               dmaobj->target = NV_MEM_TARGET_PCI_NOSNOOP;
-               break;
-       default:
-               return -EINVAL;
-       }
-
-       switch (dmaobj->access) {
-       case NV_DMA_V0_ACCESS_VM:
-               dmaobj->access = NV_MEM_ACCESS_VM;
-               break;
-       case NV_DMA_V0_ACCESS_RD:
-               dmaobj->access = NV_MEM_ACCESS_RO;
-               break;
-       case NV_DMA_V0_ACCESS_WR:
-               dmaobj->access = NV_MEM_ACCESS_WO;
-               break;
-       case NV_DMA_V0_ACCESS_RDWR:
-               dmaobj->access = NV_MEM_ACCESS_RW;
-               break;
-       default:
-               return -EINVAL;
-       }
-
-       return ret;
-}
-
-int
-_nvkm_dmaeng_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
-                 struct nvkm_oclass *oclass, void *data, u32 size,
-                 struct nvkm_object **pobject)
-{
-       const struct nvkm_dmaeng_impl *impl = (void *)oclass;
-       struct nvkm_dmaeng *dmaeng;
-       int ret;
-
-       ret = nvkm_engine_create(parent, engine, oclass, true, "DMAOBJ",
-                                "dmaobj", &dmaeng);
-       *pobject = nv_object(dmaeng);
-       if (ret)
-               return ret;
-
-       nv_engine(dmaeng)->sclass = impl->sclass;
-       dmaeng->bind = nvkm_dmaobj_bind;
-       return 0;
-}
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/gf100.c b/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/gf100.c
deleted file mode 100644 (file)
index 96a604d..0000000
+++ /dev/null
@@ -1,168 +0,0 @@
-/*
- * Copyright 2012 Red Hat Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors: Ben Skeggs
- */
-#include "priv.h"
-
-#include <core/client.h>
-#include <core/gpuobj.h>
-#include <subdev/fb.h>
-
-#include <nvif/class.h>
-#include <nvif/unpack.h>
-
-struct gf100_dmaobj {
-       struct nvkm_dmaobj base;
-       u32 flags0;
-       u32 flags5;
-};
-
-static int
-gf100_dmaobj_bind(struct nvkm_dmaobj *obj, struct nvkm_gpuobj *parent,
-                 struct nvkm_gpuobj **pgpuobj)
-{
-       struct gf100_dmaobj *dmaobj = container_of(obj, typeof(*dmaobj), base);
-       struct nvkm_device *device = dmaobj->base.base.engine->subdev.device;
-       int ret;
-
-       ret = nvkm_gpuobj_new(device, 24, 32, false, parent, pgpuobj);
-       if (ret == 0) {
-               nvkm_kmap(*pgpuobj);
-               nvkm_wo32(*pgpuobj, 0x00, dmaobj->flags0 | nv_mclass(dmaobj));
-               nvkm_wo32(*pgpuobj, 0x04, lower_32_bits(dmaobj->base.limit));
-               nvkm_wo32(*pgpuobj, 0x08, lower_32_bits(dmaobj->base.start));
-               nvkm_wo32(*pgpuobj, 0x0c, upper_32_bits(dmaobj->base.limit) << 24 |
-                                         upper_32_bits(dmaobj->base.start));
-               nvkm_wo32(*pgpuobj, 0x10, 0x00000000);
-               nvkm_wo32(*pgpuobj, 0x14, dmaobj->flags5);
-               nvkm_done(*pgpuobj);
-       }
-
-       return ret;
-}
-
-static int
-gf100_dmaobj_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
-                 struct nvkm_oclass *oclass, void *data, u32 size,
-                 struct nvkm_object **pobject)
-{
-       struct nvkm_dmaeng *dmaeng = (void *)engine;
-       union {
-               struct gf100_dma_v0 v0;
-       } *args;
-       struct gf100_dmaobj *dmaobj;
-       u32 kind, user, unkn;
-       int ret;
-
-       ret = nvkm_dmaobj_create(parent, engine, oclass, &data, &size, &dmaobj);
-       *pobject = nv_object(dmaobj);
-       if (ret)
-               return ret;
-       args = data;
-
-       nvif_ioctl(parent, "create gf100 dma size %d\n", size);
-       if (nvif_unpack(args->v0, 0, 0, false)) {
-               nvif_ioctl(parent,
-                          "create gf100 dma vers %d priv %d kind %02x\n",
-                          args->v0.version, args->v0.priv, args->v0.kind);
-               kind = args->v0.kind;
-               user = args->v0.priv;
-               unkn = 0;
-       } else
-       if (size == 0) {
-               if (dmaobj->base.target != NV_MEM_TARGET_VM) {
-                       kind = GF100_DMA_V0_KIND_PITCH;
-                       user = GF100_DMA_V0_PRIV_US;
-                       unkn = 2;
-               } else {
-                       kind = GF100_DMA_V0_KIND_VM;
-                       user = GF100_DMA_V0_PRIV_VM;
-                       unkn = 0;
-               }
-       } else
-               return ret;
-
-       if (user > 2)
-               return -EINVAL;
-       dmaobj->flags0 |= (kind << 22) | (user << 20);
-       dmaobj->flags5 |= (unkn << 16);
-
-       switch (dmaobj->base.target) {
-       case NV_MEM_TARGET_VM:
-               dmaobj->flags0 |= 0x00000000;
-               break;
-       case NV_MEM_TARGET_VRAM:
-               dmaobj->flags0 |= 0x00010000;
-               break;
-       case NV_MEM_TARGET_PCI:
-               dmaobj->flags0 |= 0x00020000;
-               break;
-       case NV_MEM_TARGET_PCI_NOSNOOP:
-               dmaobj->flags0 |= 0x00030000;
-               break;
-       default:
-               return -EINVAL;
-       }
-
-       switch (dmaobj->base.access) {
-       case NV_MEM_ACCESS_VM:
-               break;
-       case NV_MEM_ACCESS_RO:
-               dmaobj->flags0 |= 0x00040000;
-               break;
-       case NV_MEM_ACCESS_WO:
-       case NV_MEM_ACCESS_RW:
-               dmaobj->flags0 |= 0x00080000;
-               break;
-       }
-
-       return dmaeng->bind(&dmaobj->base, (void *)dmaobj, (void *)pobject);
-}
-
-static struct nvkm_ofuncs
-gf100_dmaobj_ofuncs = {
-       .ctor =  gf100_dmaobj_ctor,
-       .dtor = _nvkm_dmaobj_dtor,
-       .init = _nvkm_dmaobj_init,
-       .fini = _nvkm_dmaobj_fini,
-};
-
-static struct nvkm_oclass
-gf100_dmaeng_sclass[] = {
-       { NV_DMA_FROM_MEMORY, &gf100_dmaobj_ofuncs },
-       { NV_DMA_TO_MEMORY, &gf100_dmaobj_ofuncs },
-       { NV_DMA_IN_MEMORY, &gf100_dmaobj_ofuncs },
-       {}
-};
-
-struct nvkm_oclass *
-gf100_dmaeng_oclass = &(struct nvkm_dmaeng_impl) {
-       .base.handle = NV_ENGINE(DMAOBJ, 0xc0),
-       .base.ofuncs = &(struct nvkm_ofuncs) {
-               .ctor = _nvkm_dmaeng_ctor,
-               .dtor = _nvkm_dmaeng_dtor,
-               .init = _nvkm_dmaeng_init,
-               .fini = _nvkm_dmaeng_fini,
-       },
-       .sclass = gf100_dmaeng_sclass,
-       .bind = gf100_dmaobj_bind,
-}.base;
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/gf110.c b/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/gf110.c
deleted file mode 100644 (file)
index 017c7a2..0000000
+++ /dev/null
@@ -1,150 +0,0 @@
-/*
- * Copyright 2012 Red Hat Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors: Ben Skeggs
- */
-#include "priv.h"
-
-#include <core/client.h>
-#include <core/gpuobj.h>
-#include <subdev/fb.h>
-
-#include <nvif/class.h>
-#include <nvif/unpack.h>
-
-struct gf110_dmaobj {
-       struct nvkm_dmaobj base;
-       u32 flags0;
-};
-
-static int
-gf110_dmaobj_bind(struct nvkm_dmaobj *obj, struct nvkm_gpuobj *parent,
-                 struct nvkm_gpuobj **pgpuobj)
-{
-       struct gf110_dmaobj *dmaobj = container_of(obj, typeof(*dmaobj), base);
-       struct nvkm_device *device = dmaobj->base.base.engine->subdev.device;
-       int ret;
-
-       ret = nvkm_gpuobj_new(device, 24, 32, false, parent, pgpuobj);
-       if (ret == 0) {
-               nvkm_kmap(*pgpuobj);
-               nvkm_wo32(*pgpuobj, 0x00, dmaobj->flags0);
-               nvkm_wo32(*pgpuobj, 0x04, dmaobj->base.start >> 8);
-               nvkm_wo32(*pgpuobj, 0x08, dmaobj->base.limit >> 8);
-               nvkm_wo32(*pgpuobj, 0x0c, 0x00000000);
-               nvkm_wo32(*pgpuobj, 0x10, 0x00000000);
-               nvkm_wo32(*pgpuobj, 0x14, 0x00000000);
-               nvkm_done(*pgpuobj);
-       }
-
-       return ret;
-}
-
-static int
-gf110_dmaobj_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
-                 struct nvkm_oclass *oclass, void *data, u32 size,
-                 struct nvkm_object **pobject)
-{
-       struct nvkm_dmaeng *dmaeng = (void *)engine;
-       union {
-               struct gf110_dma_v0 v0;
-       } *args;
-       struct gf110_dmaobj *dmaobj;
-       u32 kind, page;
-       int ret;
-
-       ret = nvkm_dmaobj_create(parent, engine, oclass, &data, &size, &dmaobj);
-       *pobject = nv_object(dmaobj);
-       if (ret)
-               return ret;
-       args = data;
-
-       nvif_ioctl(parent, "create gf110 dma size %d\n", size);
-       if (nvif_unpack(args->v0, 0, 0, false)) {
-               nvif_ioctl(parent,
-                          "create gf100 dma vers %d page %d kind %02x\n",
-                          args->v0.version, args->v0.page, args->v0.kind);
-               kind = args->v0.kind;
-               page = args->v0.page;
-       } else
-       if (size == 0) {
-               if (dmaobj->base.target != NV_MEM_TARGET_VM) {
-                       kind = GF110_DMA_V0_KIND_PITCH;
-                       page = GF110_DMA_V0_PAGE_SP;
-               } else {
-                       kind = GF110_DMA_V0_KIND_VM;
-                       page = GF110_DMA_V0_PAGE_LP;
-               }
-       } else
-               return ret;
-
-       if (page > 1)
-               return -EINVAL;
-       dmaobj->flags0 = (kind << 20) | (page << 6);
-
-       switch (dmaobj->base.target) {
-       case NV_MEM_TARGET_VRAM:
-               dmaobj->flags0 |= 0x00000009;
-               break;
-       case NV_MEM_TARGET_VM:
-       case NV_MEM_TARGET_PCI:
-       case NV_MEM_TARGET_PCI_NOSNOOP:
-               /* XXX: don't currently know how to construct a real one
-                *      of these.  we only use them to represent pushbufs
-                *      on these chipsets, and the classes that use them
-                *      deal with the target themselves.
-                */
-               break;
-       default:
-               return -EINVAL;
-       }
-
-       return dmaeng->bind(&dmaobj->base, (void *)dmaobj, (void *)pobject);
-}
-
-static struct nvkm_ofuncs
-gf110_dmaobj_ofuncs = {
-       .ctor =  gf110_dmaobj_ctor,
-       .dtor = _nvkm_dmaobj_dtor,
-       .init = _nvkm_dmaobj_init,
-       .fini = _nvkm_dmaobj_fini,
-};
-
-static struct nvkm_oclass
-gf110_dmaeng_sclass[] = {
-       { NV_DMA_FROM_MEMORY, &gf110_dmaobj_ofuncs },
-       { NV_DMA_TO_MEMORY, &gf110_dmaobj_ofuncs },
-       { NV_DMA_IN_MEMORY, &gf110_dmaobj_ofuncs },
-       {}
-};
-
-struct nvkm_oclass *
-gf110_dmaeng_oclass = &(struct nvkm_dmaeng_impl) {
-       .base.handle = NV_ENGINE(DMAOBJ, 0xd0),
-       .base.ofuncs = &(struct nvkm_ofuncs) {
-               .ctor = _nvkm_dmaeng_ctor,
-               .dtor = _nvkm_dmaeng_dtor,
-               .init = _nvkm_dmaeng_init,
-               .fini = _nvkm_dmaeng_fini,
-       },
-       .sclass = gf110_dmaeng_sclass,
-       .bind = gf110_dmaobj_bind,
-}.base;
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/nv04.c b/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/nv04.c
deleted file mode 100644 (file)
index 6be2dfc..0000000
+++ /dev/null
@@ -1,154 +0,0 @@
-/*
- * Copyright 2012 Red Hat Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors: Ben Skeggs
- */
-#include "priv.h"
-
-#include <core/gpuobj.h>
-#include <subdev/fb.h>
-#include <subdev/mmu/nv04.h>
-
-#include <nvif/class.h>
-
-struct nv04_dmaobj {
-       struct nvkm_dmaobj base;
-       bool clone;
-       u32 flags0;
-       u32 flags2;
-};
-
-static int
-nv04_dmaobj_bind(struct nvkm_dmaobj *obj, struct nvkm_gpuobj *parent,
-                struct nvkm_gpuobj **pgpuobj)
-{
-       struct nv04_dmaobj *dmaobj = container_of(obj, typeof(*dmaobj), base);
-       struct nvkm_device *device = dmaobj->base.base.engine->subdev.device;
-       u64 offset = dmaobj->base.start & 0xfffff000;
-       u64 adjust = dmaobj->base.start & 0x00000fff;
-       u32 length = dmaobj->base.limit - dmaobj->base.start;
-       int ret;
-
-       if (dmaobj->clone) {
-               struct nv04_mmu *mmu = nv04_mmu(dmaobj);
-               struct nvkm_memory *pgt = mmu->vm->pgt[0].mem[0];
-               if (!dmaobj->base.start)
-                       return nvkm_gpuobj_wrap(pgt, pgpuobj);
-               nvkm_kmap(pgt);
-               offset  = nvkm_ro32(pgt, 8 + (offset >> 10));
-               offset &= 0xfffff000;
-               nvkm_done(pgt);
-       }
-
-       ret = nvkm_gpuobj_new(device, 16, 16, false, parent, pgpuobj);
-       if (ret == 0) {
-               nvkm_kmap(*pgpuobj);
-               nvkm_wo32(*pgpuobj, 0x00, dmaobj->flags0 | (adjust << 20));
-               nvkm_wo32(*pgpuobj, 0x04, length);
-               nvkm_wo32(*pgpuobj, 0x08, dmaobj->flags2 | offset);
-               nvkm_wo32(*pgpuobj, 0x0c, dmaobj->flags2 | offset);
-               nvkm_done(*pgpuobj);
-       }
-
-       return ret;
-}
-
-static int
-nv04_dmaobj_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
-                struct nvkm_oclass *oclass, void *data, u32 size,
-                struct nvkm_object **pobject)
-{
-       struct nvkm_dmaeng *dmaeng = (void *)engine;
-       struct nv04_mmu *mmu = nv04_mmu(engine);
-       struct nv04_dmaobj *dmaobj;
-       int ret;
-
-       ret = nvkm_dmaobj_create(parent, engine, oclass, &data, &size, &dmaobj);
-       *pobject = nv_object(dmaobj);
-       if (ret || (ret = -ENOSYS, size))
-               return ret;
-
-       if (dmaobj->base.target == NV_MEM_TARGET_VM) {
-               if (nv_object(mmu)->oclass == &nv04_mmu_oclass)
-                       dmaobj->clone = true;
-               dmaobj->base.target = NV_MEM_TARGET_PCI;
-               dmaobj->base.access = NV_MEM_ACCESS_RW;
-       }
-
-       dmaobj->flags0 = nv_mclass(dmaobj);
-       switch (dmaobj->base.target) {
-       case NV_MEM_TARGET_VRAM:
-               dmaobj->flags0 |= 0x00003000;
-               break;
-       case NV_MEM_TARGET_PCI:
-               dmaobj->flags0 |= 0x00023000;
-               break;
-       case NV_MEM_TARGET_PCI_NOSNOOP:
-               dmaobj->flags0 |= 0x00033000;
-               break;
-       default:
-               return -EINVAL;
-       }
-
-       switch (dmaobj->base.access) {
-       case NV_MEM_ACCESS_RO:
-               dmaobj->flags0 |= 0x00004000;
-               break;
-       case NV_MEM_ACCESS_WO:
-               dmaobj->flags0 |= 0x00008000;
-       case NV_MEM_ACCESS_RW:
-               dmaobj->flags2 |= 0x00000002;
-               break;
-       default:
-               return -EINVAL;
-       }
-
-       return dmaeng->bind(&dmaobj->base, (void *)dmaobj, (void *)pobject);
-}
-
-static struct nvkm_ofuncs
-nv04_dmaobj_ofuncs = {
-       .ctor =  nv04_dmaobj_ctor,
-       .dtor = _nvkm_dmaobj_dtor,
-       .init = _nvkm_dmaobj_init,
-       .fini = _nvkm_dmaobj_fini,
-};
-
-static struct nvkm_oclass
-nv04_dmaeng_sclass[] = {
-       { NV_DMA_FROM_MEMORY, &nv04_dmaobj_ofuncs },
-       { NV_DMA_TO_MEMORY, &nv04_dmaobj_ofuncs },
-       { NV_DMA_IN_MEMORY, &nv04_dmaobj_ofuncs },
-       {}
-};
-
-struct nvkm_oclass *
-nv04_dmaeng_oclass = &(struct nvkm_dmaeng_impl) {
-       .base.handle = NV_ENGINE(DMAOBJ, 0x04),
-       .base.ofuncs = &(struct nvkm_ofuncs) {
-               .ctor = _nvkm_dmaeng_ctor,
-               .dtor = _nvkm_dmaeng_dtor,
-               .init = _nvkm_dmaeng_init,
-               .fini = _nvkm_dmaeng_fini,
-       },
-       .sclass = nv04_dmaeng_sclass,
-       .bind = nv04_dmaobj_bind,
-}.base;
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/nv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/nv50.c
deleted file mode 100644 (file)
index f87134e..0000000
+++ /dev/null
@@ -1,174 +0,0 @@
-/*
- * Copyright 2012 Red Hat Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors: Ben Skeggs
- */
-#include "priv.h"
-
-#include <core/client.h>
-#include <core/gpuobj.h>
-#include <subdev/fb.h>
-
-#include <nvif/class.h>
-#include <nvif/unpack.h>
-
-struct nv50_dmaobj {
-       struct nvkm_dmaobj base;
-       u32 flags0;
-       u32 flags5;
-};
-
-static int
-nv50_dmaobj_bind(struct nvkm_dmaobj *obj, struct nvkm_gpuobj *parent,
-                struct nvkm_gpuobj **pgpuobj)
-{
-       struct nv50_dmaobj *dmaobj = container_of(obj, typeof(*dmaobj), base);
-       struct nvkm_device *device = dmaobj->base.base.engine->subdev.device;
-       int ret;
-
-       ret = nvkm_gpuobj_new(device, 24, 32, false, parent, pgpuobj);
-       if (ret == 0) {
-               nvkm_kmap(*pgpuobj);
-               nvkm_wo32(*pgpuobj, 0x00, dmaobj->flags0 | nv_mclass(dmaobj));
-               nvkm_wo32(*pgpuobj, 0x04, lower_32_bits(dmaobj->base.limit));
-               nvkm_wo32(*pgpuobj, 0x08, lower_32_bits(dmaobj->base.start));
-               nvkm_wo32(*pgpuobj, 0x0c, upper_32_bits(dmaobj->base.limit) << 24 |
-                                         upper_32_bits(dmaobj->base.start));
-               nvkm_wo32(*pgpuobj, 0x10, 0x00000000);
-               nvkm_wo32(*pgpuobj, 0x14, dmaobj->flags5);
-               nvkm_done(*pgpuobj);
-       }
-
-       return ret;
-}
-
-static int
-nv50_dmaobj_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
-                struct nvkm_oclass *oclass, void *data, u32 size,
-                struct nvkm_object **pobject)
-{
-       struct nvkm_dmaeng *dmaeng = (void *)engine;
-       union {
-               struct nv50_dma_v0 v0;
-       } *args;
-       struct nv50_dmaobj *dmaobj;
-       u32 user, part, comp, kind;
-       int ret;
-
-       ret = nvkm_dmaobj_create(parent, engine, oclass, &data, &size, &dmaobj);
-       *pobject = nv_object(dmaobj);
-       if (ret)
-               return ret;
-       args = data;
-
-       nvif_ioctl(parent, "create nv50 dma size %d\n", size);
-       if (nvif_unpack(args->v0, 0, 0, false)) {
-               nvif_ioctl(parent, "create nv50 dma vers %d priv %d part %d "
-                                  "comp %d kind %02x\n", args->v0.version,
-                          args->v0.priv, args->v0.part, args->v0.comp,
-                          args->v0.kind);
-               user = args->v0.priv;
-               part = args->v0.part;
-               comp = args->v0.comp;
-               kind = args->v0.kind;
-       } else
-       if (size == 0) {
-               if (dmaobj->base.target != NV_MEM_TARGET_VM) {
-                       user = NV50_DMA_V0_PRIV_US;
-                       part = NV50_DMA_V0_PART_256;
-                       comp = NV50_DMA_V0_COMP_NONE;
-                       kind = NV50_DMA_V0_KIND_PITCH;
-               } else {
-                       user = NV50_DMA_V0_PRIV_VM;
-                       part = NV50_DMA_V0_PART_VM;
-                       comp = NV50_DMA_V0_COMP_VM;
-                       kind = NV50_DMA_V0_KIND_VM;
-               }
-       } else
-               return ret;
-
-       if (user > 2 || part > 2 || comp > 3 || kind > 0x7f)
-               return -EINVAL;
-       dmaobj->flags0 = (comp << 29) | (kind << 22) | (user << 20);
-       dmaobj->flags5 = (part << 16);
-
-       switch (dmaobj->base.target) {
-       case NV_MEM_TARGET_VM:
-               dmaobj->flags0 |= 0x00000000;
-               break;
-       case NV_MEM_TARGET_VRAM:
-               dmaobj->flags0 |= 0x00010000;
-               break;
-       case NV_MEM_TARGET_PCI:
-               dmaobj->flags0 |= 0x00020000;
-               break;
-       case NV_MEM_TARGET_PCI_NOSNOOP:
-               dmaobj->flags0 |= 0x00030000;
-               break;
-       default:
-               return -EINVAL;
-       }
-
-       switch (dmaobj->base.access) {
-       case NV_MEM_ACCESS_VM:
-               break;
-       case NV_MEM_ACCESS_RO:
-               dmaobj->flags0 |= 0x00040000;
-               break;
-       case NV_MEM_ACCESS_WO:
-       case NV_MEM_ACCESS_RW:
-               dmaobj->flags0 |= 0x00080000;
-               break;
-       default:
-               return -EINVAL;
-       }
-
-       return dmaeng->bind(&dmaobj->base, (void *)dmaobj, (void *)pobject);
-}
-
-static struct nvkm_ofuncs
-nv50_dmaobj_ofuncs = {
-       .ctor =  nv50_dmaobj_ctor,
-       .dtor = _nvkm_dmaobj_dtor,
-       .init = _nvkm_dmaobj_init,
-       .fini = _nvkm_dmaobj_fini,
-};
-
-static struct nvkm_oclass
-nv50_dmaeng_sclass[] = {
-       { NV_DMA_FROM_MEMORY, &nv50_dmaobj_ofuncs },
-       { NV_DMA_TO_MEMORY, &nv50_dmaobj_ofuncs },
-       { NV_DMA_IN_MEMORY, &nv50_dmaobj_ofuncs },
-       {}
-};
-
-struct nvkm_oclass *
-nv50_dmaeng_oclass = &(struct nvkm_dmaeng_impl) {
-       .base.handle = NV_ENGINE(DMAOBJ, 0x50),
-       .base.ofuncs = &(struct nvkm_ofuncs) {
-               .ctor = _nvkm_dmaeng_ctor,
-               .dtor = _nvkm_dmaeng_dtor,
-               .init = _nvkm_dmaeng_init,
-               .fini = _nvkm_dmaeng_fini,
-       },
-       .sclass = nv50_dmaeng_sclass,
-       .bind = nv50_dmaobj_bind,
-}.base;
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/priv.h b/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/priv.h
deleted file mode 100644 (file)
index 614d9e6..0000000
+++ /dev/null
@@ -1,28 +0,0 @@
-#ifndef __NVKM_DMAOBJ_PRIV_H__
-#define __NVKM_DMAOBJ_PRIV_H__
-#include <engine/dmaobj.h>
-
-#define nvkm_dmaobj_create(p,e,c,pa,sa,d)                                      \
-       nvkm_dmaobj_create_((p), (e), (c), (pa), (sa), sizeof(**d), (void **)d)
-
-int nvkm_dmaobj_create_(struct nvkm_object *, struct nvkm_object *,
-                       struct nvkm_oclass *, void **, u32 *,
-                       int, void **);
-#define _nvkm_dmaobj_dtor nvkm_object_destroy
-#define _nvkm_dmaobj_init _nvkm_object_init
-#define _nvkm_dmaobj_fini _nvkm_object_fini
-
-int _nvkm_dmaeng_ctor(struct nvkm_object *, struct nvkm_object *,
-                     struct nvkm_oclass *, void *, u32,
-                     struct nvkm_object **);
-#define _nvkm_dmaeng_dtor _nvkm_engine_dtor
-#define _nvkm_dmaeng_init _nvkm_engine_init
-#define _nvkm_dmaeng_fini _nvkm_engine_fini
-
-struct nvkm_dmaeng_impl {
-       struct nvkm_oclass base;
-       struct nvkm_oclass *sclass;
-       int (*bind)(struct nvkm_dmaobj *, struct nvkm_gpuobj *,
-                   struct nvkm_gpuobj **);
-};
-#endif
index 60e5fab4c80a3a16edaa20f69739336ac52ac449..a3b663832dbf63fb7d98c7e9f532572fdf4ae9b5 100644 (file)
@@ -26,7 +26,7 @@
 #include <core/client.h>
 #include <core/handle.h>
 #include <core/notify.h>
-#include <engine/dmaobj.h>
+#include <engine/dma.h>
 
 #include <nvif/class.h>
 #include <nvif/event.h>
@@ -104,7 +104,7 @@ nvkm_fifo_channel_create_(struct nvkm_object *parent,
        struct nvkm_fifo *fifo = (void *)engine;
        struct nvkm_fifo_base *base = (void *)parent;
        struct nvkm_fifo_chan *chan;
-       struct nvkm_dmaeng *dmaeng;
+       struct nvkm_dma *dma;
        struct nvkm_subdev *subdev = &fifo->engine.subdev;
        struct nvkm_device *device = subdev->device;
        unsigned long flags;
@@ -124,7 +124,7 @@ nvkm_fifo_channel_create_(struct nvkm_object *parent,
                        return -ENOENT;
                dmaobj = (void *)handle->object;
 
-               dmaeng = (void *)dmaobj->base.engine;
+               dma = (void *)dmaobj->base.engine;
                switch (dmaobj->base.oclass->handle) {
                case NV_DMA_FROM_MEMORY:
                case NV_DMA_IN_MEMORY:
@@ -133,7 +133,7 @@ nvkm_fifo_channel_create_(struct nvkm_object *parent,
                        return -EINVAL;
                }
 
-               ret = dmaeng->bind(dmaobj, &base->gpuobj, &chan->pushgpu);
+               ret = dma->bind(dmaobj, &base->gpuobj, &chan->pushgpu);
                if (ret)
                        return ret;
        }