ASoC: AMD: For capture have interrupts on I2S->ACP channel

Having interrupts enabled for ACP<->SYSMEM DMA transfer, we are in
for an interrupt storm.
For both playback and capture interrupts should be enabled for
I2S<->ACP DMA.

Signed-off-by: Akshu Agrawal <akshu.agrawal@amd.com>
Signed-off-by: Mark Brown <broonie@kernel.org>

diff --git a/sound/soc/amd/acp-pcm-dma.c b/sound/soc/amd/acp-pcm-dma.c
index eeb86776725248f7f9b94acccd3d92e191fece70..94bcf69008df9276e3051bf5ec685faa7a2e30c8 100644 (file)
--- a/sound/soc/amd/acp-pcm-dma.c
+++ b/sound/soc/amd/acp-pcm-dma.c
@@ -224,13 +224,11 @@ static void set_acp_sysmem_dma_descriptors(void __iomem *acp_mmio,
                        switch (asic_type) {
                        case CHIP_STONEY:
                                dmadscr[i].xfer_val |=
-                               BIT(22) |
                                (ACP_DMA_ATTR_SHARED_MEM_TO_DAGB_GARLIC << 16) |
                                (size / 2);
                                break;
                        default:
                                dmadscr[i].xfer_val |=
-                               BIT(22) |
                                (ACP_DMA_ATTR_SHAREDMEM_TO_DAGB_ONION << 16) |
                                (size / 2);
                        }
@@ -421,9 +419,9 @@ static void acp_dma_start(void __iomem *acp_mmio, u16 ch_num)
 
        switch (ch_num) {
        case ACP_TO_I2S_DMA_CH_NUM:
-       case ACP_TO_SYSRAM_CH_NUM:
+       case I2S_TO_ACP_DMA_CH_NUM:
        case ACP_TO_I2S_DMA_BT_INSTANCE_CH_NUM:
-       case ACP_TO_SYSRAM_BT_INSTANCE_CH_NUM:
+       case I2S_TO_ACP_DMA_BT_INSTANCE_CH_NUM:
                dma_ctrl |= ACP_DMA_CNTL_0__DMAChIOCEn_MASK;
                break;
        default:
@@ -705,18 +703,18 @@ static irqreturn_t dma_irq_handler(int irq, void *arg)
                              acp_mmio, mmACP_EXTERNAL_INTR_STAT);
        }
 
-       if ((intr_flag & BIT(ACP_TO_SYSRAM_CH_NUM)) != 0) {
+       if ((intr_flag & BIT(I2S_TO_ACP_DMA_CH_NUM)) != 0) {
                valid_irq = true;
                snd_pcm_period_elapsed(irq_data->capture_i2ssp_stream);
-               acp_reg_write((intr_flag & BIT(ACP_TO_SYSRAM_CH_NUM)) << 16,
+               acp_reg_write((intr_flag & BIT(I2S_TO_ACP_DMA_CH_NUM)) << 16,
                              acp_mmio, mmACP_EXTERNAL_INTR_STAT);
        }
 
-       if ((intr_flag & BIT(ACP_TO_SYSRAM_BT_INSTANCE_CH_NUM)) != 0) {
+       if ((intr_flag & BIT(I2S_TO_ACP_DMA_BT_INSTANCE_CH_NUM)) != 0) {
                valid_irq = true;
                snd_pcm_period_elapsed(irq_data->capture_i2sbt_stream);
                acp_reg_write((intr_flag &
-                             BIT(ACP_TO_SYSRAM_BT_INSTANCE_CH_NUM)) << 16,
+                             BIT(I2S_TO_ACP_DMA_BT_INSTANCE_CH_NUM)) << 16,
                              acp_mmio, mmACP_EXTERNAL_INTR_STAT);
        }