ARM: 7818/1: feroceon: Add suspend/resume operation
authorEzequiel Garcia <ezequiel.garcia@free-electrons.com>
Fri, 16 Aug 2013 09:28:24 +0000 (10:28 +0100)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Mon, 19 Aug 2013 23:12:52 +0000 (00:12 +0100)
Add support for suspend/resume operations. The implemented procedures
are identical to the ones for ARM926.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/Kconfig
arch/arm/mm/proc-feroceon.S

index 32506dfa5e73fcbe4d16cd439754451d65079a76..57562f8d1f929b845b1f05e66b5225f96a8e0d3b 100644 (file)
@@ -2240,7 +2240,7 @@ source "kernel/power/Kconfig"
 
 config ARCH_SUSPEND_POSSIBLE
        depends on !ARCH_S5PC100
-       depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \
+       depends on CPU_ARM920T || CPU_ARM926T || CPU_FEROCEON || CPU_SA1100 || \
                CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE || CPU_MOHAWK
        def_bool y
 
index d5146b98c8d12bd59037017244bc0bf5ab9c4099..db79b62c92fb1c26ef777b54c4c8f49fe94047a6 100644 (file)
@@ -514,6 +514,32 @@ ENTRY(cpu_feroceon_set_pte_ext)
 #endif
        mov     pc, lr
 
+/* Suspend/resume support: taken from arch/arm/mm/proc-arm926.S */
+.globl cpu_feroceon_suspend_size
+.equ   cpu_feroceon_suspend_size, 4 * 3
+#ifdef CONFIG_ARM_CPU_SUSPEND
+ENTRY(cpu_feroceon_do_suspend)
+       stmfd   sp!, {r4 - r6, lr}
+       mrc     p15, 0, r4, c13, c0, 0  @ PID
+       mrc     p15, 0, r5, c3, c0, 0   @ Domain ID
+       mrc     p15, 0, r6, c1, c0, 0   @ Control register
+       stmia   r0, {r4 - r6}
+       ldmfd   sp!, {r4 - r6, pc}
+ENDPROC(cpu_feroceon_do_suspend)
+
+ENTRY(cpu_feroceon_do_resume)
+       mov     ip, #0
+       mcr     p15, 0, ip, c8, c7, 0   @ invalidate I+D TLBs
+       mcr     p15, 0, ip, c7, c7, 0   @ invalidate I+D caches
+       ldmia   r0, {r4 - r6}
+       mcr     p15, 0, r4, c13, c0, 0  @ PID
+       mcr     p15, 0, r5, c3, c0, 0   @ Domain ID
+       mcr     p15, 0, r1, c2, c0, 0   @ TTB address
+       mov     r0, r6                  @ control register
+       b       cpu_resume_mmu
+ENDPROC(cpu_feroceon_do_resume)
+#endif
+
        .type   __feroceon_setup, #function
 __feroceon_setup:
        mov     r0, #0