ARM: dts: r8a7742: Add IPMMU DT nodes

Add the five IPMMU instances found in the r8a7742 to DT with a disabled
status.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com>
Link: https://lore.kernel.org/r/20200825141805.27105-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/arch/arm/boot/dts/r8a7742.dtsi b/arch/arm/boot/dts/r8a7742.dtsi
index 0fc52b27ae64956f1629c5b2bb741feb39e08588..c62e26876f95d7196d811ee1edc14ddc30b86b09 100644 (file)
--- a/arch/arm/boot/dts/r8a7742.dtsi
+++ b/arch/arm/boot/dts/r8a7742.dtsi
@@ -412,6 +412,54 @@
                        #thermal-sensor-cells = <0>;
                };
 
+               ipmmu_sy0: iommu@e6280000 {
+                       compatible = "renesas,ipmmu-r8a7742",
+                                    "renesas,ipmmu-vmsa";
+                       reg = <0 0xe6280000 0 0x1000>;
+                       interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
+                       #iommu-cells = <1>;
+                       status = "disabled";
+               };
+
+               ipmmu_sy1: iommu@e6290000 {
+                       compatible = "renesas,ipmmu-r8a7742",
+                                    "renesas,ipmmu-vmsa";
+                       reg = <0 0xe6290000 0 0x1000>;
+                       interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
+                       #iommu-cells = <1>;
+                       status = "disabled";
+               };
+
+               ipmmu_ds: iommu@e6740000 {
+                       compatible = "renesas,ipmmu-r8a7742",
+                                    "renesas,ipmmu-vmsa";
+                       reg = <0 0xe6740000 0 0x1000>;
+                       interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
+                       #iommu-cells = <1>;
+                       status = "disabled";
+               };
+
+               ipmmu_mp: iommu@ec680000 {
+                       compatible = "renesas,ipmmu-r8a7742",
+                                    "renesas,ipmmu-vmsa";
+                       reg = <0 0xec680000 0 0x1000>;
+                       interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
+                       #iommu-cells = <1>;
+                       status = "disabled";
+               };
+
+               ipmmu_mx: iommu@fe951000 {
+                       compatible = "renesas,ipmmu-r8a7742",
+                                    "renesas,ipmmu-vmsa";
+                       reg = <0 0xfe951000 0 0x1000>;
+                       interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
+                       #iommu-cells = <1>;
+                       status = "disabled";
+               };
+
                icram0: sram@e63a0000 {
                        compatible = "mmio-sram";
                        reg = <0 0xe63a0000 0 0x12000>;