drm/i915/gvt: Add KBL platform definition.
authorXu Han <xu.han@intel.com>
Wed, 29 Mar 2017 02:13:56 +0000 (10:13 +0800)
committerZhenyu Wang <zhenyuw@linux.intel.com>
Wed, 29 Mar 2017 07:28:51 +0000 (15:28 +0800)
Add KBL platform definition.

Signed-off-by: Xu Han <xu.han@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
drivers/gpu/drm/i915/gvt/mmio.h

index a3a027025cd0a40f9543e6ee76b385a4ad761dcc..7edd66f38ef987499d7bb2abe44efe960127e102 100644 (file)
@@ -44,20 +44,21 @@ struct intel_vgpu;
 #define D_HSW   (1 << 2)
 #define D_BDW   (1 << 3)
 #define D_SKL  (1 << 4)
+#define D_KBL  (1 << 5)
 
-#define D_GEN9PLUS     (D_SKL)
-#define D_GEN8PLUS     (D_BDW | D_SKL)
-#define D_GEN75PLUS    (D_HSW | D_BDW | D_SKL)
-#define D_GEN7PLUS     (D_IVB | D_HSW | D_BDW | D_SKL)
+#define D_GEN9PLUS     (D_SKL | D_KBL)
+#define D_GEN8PLUS     (D_BDW | D_SKL | D_KBL)
+#define D_GEN75PLUS    (D_HSW | D_BDW | D_SKL | D_KBL)
+#define D_GEN7PLUS     (D_IVB | D_HSW | D_BDW | D_SKL | D_KBL)
 
-#define D_SKL_PLUS     (D_SKL)
-#define D_BDW_PLUS     (D_BDW | D_SKL)
-#define D_HSW_PLUS     (D_HSW | D_BDW | D_SKL)
-#define D_IVB_PLUS     (D_IVB | D_HSW | D_BDW | D_SKL)
+#define D_SKL_PLUS     (D_SKL | D_KBL)
+#define D_BDW_PLUS     (D_BDW | D_SKL | D_KBL)
+#define D_HSW_PLUS     (D_HSW | D_BDW | D_SKL | D_KBL)
+#define D_IVB_PLUS     (D_IVB | D_HSW | D_BDW | D_SKL | D_KBL)
 
 #define D_PRE_BDW      (D_SNB | D_IVB | D_HSW)
 #define D_PRE_SKL      (D_SNB | D_IVB | D_HSW | D_BDW)
-#define D_ALL          (D_SNB | D_IVB | D_HSW | D_BDW | D_SKL)
+#define D_ALL          (D_SNB | D_IVB | D_HSW | D_BDW | D_SKL | D_KBL)
 
 struct intel_gvt_mmio_info {
        u32 offset;