usb: xhci: refactor xhci_set_cmd_ring_deq()
authorNiklas Neronin <niklas.neronin@linux.intel.com>
Thu, 15 May 2025 13:56:03 +0000 (16:56 +0300)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 21 May 2025 10:35:32 +0000 (12:35 +0200)
Refactor xhci_set_cmd_ring_deq() making the code more understandable by
using more descriptive constants and separating operations logically.

- Remove 'CMD_RING_RSVD_BITS' the macro is misleading, the reserved bits
  are 5:4, yet the mask is for bits 5:0.
- Introduce masks 'CMD_RING_PTR_MASK' and 'CMD_RING_CYCLE' to clearly
  define the bits for the Command Ring pointer and Command Ring Cycle.
- Simplifying the process of setting the command ring address by separating
  the DMA address calculation and the Command Ring Control register (crcr)
  updates.
- Remove the "// " prefix from trace messages, as it is unnecessary and
  distracting.

Note: In the current implementation, the cycle bit is not cleared before
applying the OR operation. Although this hasn't caused issues so far
because the bit is '0' before reaching this function, the bit is now
cleared before being set to prevent potential future problems and simplify
the process.

Signed-off-by: Niklas Neronin <niklas.neronin@linux.intel.com>
Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
Link: https://lore.kernel.org/r/20250515135621.335595-7-mathias.nyman@linux.intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/usb/host/xhci.c
drivers/usb/host/xhci.h

index 66a9106d8b3103640918347ac38ee35d2c026bf5..4c9174c5c7c72d426121d16cf3795df019aa77af 100644 (file)
@@ -497,19 +497,21 @@ static void xhci_enable_max_dev_slots(struct xhci_hcd *xhci)
 
 static void xhci_set_cmd_ring_deq(struct xhci_hcd *xhci)
 {
-       u64     val_64;
-
-       /* step 2: initialize command ring buffer */
-       val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
-       val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) |
-               (xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
-                                       xhci->cmd_ring->dequeue) &
-                       (u64) ~CMD_RING_RSVD_BITS) |
-               xhci->cmd_ring->cycle_state;
-       xhci_dbg_trace(xhci, trace_xhci_dbg_init,
-                       "// Setting command ring address to 0x%llx",
-                       (unsigned long long) val_64);
-       xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring);
+       dma_addr_t deq_dma;
+       u64 crcr;
+
+       deq_dma = xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg, xhci->cmd_ring->dequeue);
+       deq_dma &= CMD_RING_PTR_MASK;
+
+       crcr = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
+       crcr &= ~CMD_RING_PTR_MASK;
+       crcr |= deq_dma;
+
+       crcr &= ~CMD_RING_CYCLE;
+       crcr |= xhci->cmd_ring->cycle_state;
+
+       xhci_dbg_trace(xhci, trace_xhci_dbg_init, "Setting command ring address to 0x%llx", crcr);
+       xhci_write_64(xhci, crcr, &xhci->op_regs->cmd_ring);
 }
 
 /*
index f8198ec029812e8f92856ec32f877498b2c19480..6c1758f8fd012dfde8c58c722fb9d65a69499dfb 100644 (file)
@@ -191,16 +191,16 @@ struct xhci_op_regs {
 #define        DEV_NOTE_FWAKE          ENABLE_DEV_NOTE(1)
 
 /* CRCR - Command Ring Control Register - cmd_ring bitmasks */
-/* bit 0 is the command ring cycle state */
+/* bit 0 - Cycle bit indicates the ownership of the command ring */
+#define CMD_RING_CYCLE         (1 << 0)
 /* stop ring operation after completion of the currently executing command */
 #define CMD_RING_PAUSE         (1 << 1)
 /* stop ring immediately - abort the currently executing command */
 #define CMD_RING_ABORT         (1 << 2)
 /* true: command ring is running */
 #define CMD_RING_RUNNING       (1 << 3)
-/* bits 4:5 reserved and should be preserved */
-/* Command Ring pointer - bit mask for the lower 32 bits. */
-#define CMD_RING_RSVD_BITS     (0x3f)
+/* bits 63:6 - Command Ring pointer */
+#define CMD_RING_PTR_MASK      GENMASK_ULL(63, 6)
 
 /* CONFIG - Configure Register - config_reg bitmasks */
 /* bits 0:7 - maximum number of device slots enabled (NumSlotsEn) */