drm/i915: Replace the hardcoded I915_FENCE_TIMEOUT
authorChris Wilson <chris@chris-wilson.co.uk>
Sat, 9 May 2020 10:50:21 +0000 (11:50 +0100)
committerChris Wilson <chris@chris-wilson.co.uk>
Sat, 9 May 2020 11:57:57 +0000 (12:57 +0100)
Expose the hardcoded timeout for unsignaled foreign fences as a Kconfig
option, primarily to allow brave systems to disable the timeout and
solely rely on correct signaling.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Acked-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200509105021.12542-1-chris@chris-wilson.co.uk
drivers/gpu/drm/i915/Kconfig.profile
drivers/gpu/drm/i915/Makefile
drivers/gpu/drm/i915/display/intel_display.c
drivers/gpu/drm/i915/gem/i915_gem_clflush.c
drivers/gpu/drm/i915/gem/i915_gem_client_blt.c
drivers/gpu/drm/i915/gem/i915_gem_fence.c
drivers/gpu/drm/i915/i915_config.c [new file with mode: 0644]
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/i915/i915_request.c

index 0bfd276c19fe60be6f0b75c533656ad7fa3dcbe2..35bbe2b805962802853f5a543bde56ab120d4239 100644 (file)
@@ -1,3 +1,15 @@
+config DRM_I915_FENCE_TIMEOUT
+       int "Timeout for unsignaled foreign fences (ms, jiffy granularity)"
+       default 10000 # milliseconds
+       help
+         When listening to a foreign fence, we install a supplementary timer
+         to ensure that we are always signaled and our userspace is able to
+         make forward progress. This value specifies the timeout used for an
+         unsignaled foreign fence.
+
+         May be 0 to disable the timeout, and rely on the foreign fence being
+         eventually signaled.
+
 config DRM_I915_USERFAULT_AUTOSUSPEND
        int "Runtime autosuspend delay for userspace GGTT mmaps (ms)"
        default 250 # milliseconds
index 5359c736c7898dee76795283cee41f11e8eb9a93..b0da6ea6e3f1f45c166c79cdf8e4492df41bbafa 100644 (file)
@@ -35,6 +35,7 @@ subdir-ccflags-y += -I$(srctree)/$(src)
 
 # core driver code
 i915-y += i915_drv.o \
+         i915_config.o \
          i915_irq.o \
          i915_getparam.o \
          i915_params.o \
index 268d65e23472a5615413af608b394dda519cbeab..fb41f36c02562b0578fa9f87cb6236878590d6e8 100644 (file)
@@ -15815,7 +15815,7 @@ intel_prepare_plane_fb(struct drm_plane *_plane,
        if (new_plane_state->uapi.fence) { /* explicit fencing */
                ret = i915_sw_fence_await_dma_fence(&state->commit_ready,
                                                    new_plane_state->uapi.fence,
-                                                   I915_FENCE_TIMEOUT,
+                                                   i915_fence_timeout(dev_priv),
                                                    GFP_KERNEL);
                if (ret < 0)
                        return ret;
@@ -15842,7 +15842,8 @@ intel_prepare_plane_fb(struct drm_plane *_plane,
 
                ret = i915_sw_fence_await_reservation(&state->commit_ready,
                                                      obj->base.resv, NULL,
-                                                     false, I915_FENCE_TIMEOUT,
+                                                     false,
+                                                     i915_fence_timeout(dev_priv),
                                                      GFP_KERNEL);
                if (ret < 0)
                        goto unpin_fb;
index 34be4c0ee7c59a3d9b64a8219d224f28ed6c52ca..bc02237169064d615c38d3bbe43f0804d75b59bb 100644 (file)
@@ -108,7 +108,7 @@ bool i915_gem_clflush_object(struct drm_i915_gem_object *obj,
        if (clflush) {
                i915_sw_fence_await_reservation(&clflush->base.chain,
                                                obj->base.resv, NULL, true,
-                                               I915_FENCE_TIMEOUT,
+                                               i915_fence_timeout(to_i915(obj->base.dev)),
                                                I915_FENCE_GFP);
                dma_resv_add_excl_fence(obj->base.resv, &clflush->base.dma);
                dma_fence_work_commit(&clflush->base);
index 3a146aa2593b2f3cdb1442c1a545aa7afc9170ec..d3a86a4d5c0417d683511151414c1920ac99ba51 100644 (file)
@@ -288,8 +288,7 @@ int i915_gem_schedule_fill_pages_blt(struct drm_i915_gem_object *obj,
 
        i915_gem_object_lock(obj);
        err = i915_sw_fence_await_reservation(&work->wait,
-                                             obj->base.resv, NULL,
-                                             true, I915_FENCE_TIMEOUT,
+                                             obj->base.resv, NULL, true, 0,
                                              I915_FENCE_GFP);
        if (err < 0) {
                dma_fence_set_error(&work->dma, err);
index 2f6100ec260820c6f17b0f2af5e896e8923c91ff..8ab842c80f995a62bccf903d93403dd5ae2e957f 100644 (file)
@@ -72,8 +72,8 @@ i915_gem_object_lock_fence(struct drm_i915_gem_object *obj)
                       0, 0);
 
        if (i915_sw_fence_await_reservation(&stub->chain,
-                                           obj->base.resv, NULL,
-                                           true, I915_FENCE_TIMEOUT,
+                                           obj->base.resv, NULL, true,
+                                           i915_fence_timeout(to_i915(obj->base.dev)),
                                            I915_FENCE_GFP) < 0)
                goto err;
 
diff --git a/drivers/gpu/drm/i915/i915_config.c b/drivers/gpu/drm/i915/i915_config.c
new file mode 100644 (file)
index 0000000..b79b5f6
--- /dev/null
@@ -0,0 +1,15 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2020 Intel Corporation
+ */
+
+#include "i915_drv.h"
+
+unsigned long
+i915_fence_context_timeout(const struct drm_i915_private *i915, u64 context)
+{
+       if (context && IS_ACTIVE(CONFIG_DRM_I915_FENCE_TIMEOUT))
+               return msecs_to_jiffies_timeout(CONFIG_DRM_I915_FENCE_TIMEOUT);
+
+       return 0;
+}
index 7af48641dbc997c7b6008534f8e2db50b45c8a09..99d8b103057f32ba857aa7b8e9e2d48b45141a9b 100644 (file)
@@ -614,8 +614,16 @@ struct i915_gem_mm {
 
 #define I915_IDLE_ENGINES_TIMEOUT (200) /* in ms */
 
+unsigned long i915_fence_context_timeout(const struct drm_i915_private *i915,
+                                        u64 context);
+
+static inline unsigned long
+i915_fence_timeout(const struct drm_i915_private *i915)
+{
+       return i915_fence_context_timeout(i915, U64_MAX);
+}
+
 #define I915_RESET_TIMEOUT (10 * HZ) /* 10s */
-#define I915_FENCE_TIMEOUT (10 * HZ) /* 10s */
 
 #define I915_ENGINE_DEAD_TIMEOUT  (4 * HZ)  /* Seqno, head and subunits dead */
 #define I915_SEQNO_DEAD_TIMEOUT   (12 * HZ) /* Seqno dead with active head */
index 2c0de3a3b8e8a68e7c423d7379a97a8da7068e68..2d5b98549ddc802d99e93a9ed644adf4975df91d 100644 (file)
@@ -1098,7 +1098,8 @@ __i915_request_await_external(struct i915_request *rq, struct dma_fence *fence)
 {
        mark_external(rq);
        return i915_sw_fence_await_dma_fence(&rq->submit, fence,
-                                            fence->context ? I915_FENCE_TIMEOUT : 0,
+                                            i915_fence_context_timeout(rq->i915,
+                                                                       fence->context),
                                             I915_FENCE_GFP);
 }