arm64: dts: imx8mp: don't initialize audio clocks from CCM node

The audio clocks should be intitialized to the correct rate by the subsystem
using them. There is no need to always initialize them from the CCM node
assigned-clocks property. This way boards using the audio clocks in a non-
standard way can change them without first duplicating the CCM clock
setup.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index f645a09fd36159cbd577dc2d2d4bd20d00c50e78..274c088db9810f8a262c1944e0a750533a5488b6 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -738,26 +738,16 @@
                                                  <&clk IMX8MP_CLK_A53_CORE>,
                                                  <&clk IMX8MP_CLK_NOC>,
                                                  <&clk IMX8MP_CLK_NOC_IO>,
-                                                 <&clk IMX8MP_CLK_GIC>,
-                                                 <&clk IMX8MP_CLK_AUDIO_AHB>,
-                                                 <&clk IMX8MP_CLK_AUDIO_AXI_SRC>,
-                                                 <&clk IMX8MP_AUDIO_PLL1>,
-                                                 <&clk IMX8MP_AUDIO_PLL2>;
+                                                 <&clk IMX8MP_CLK_GIC>;
                                assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>,
                                                         <&clk IMX8MP_ARM_PLL_OUT>,
                                                         <&clk IMX8MP_SYS_PLL2_1000M>,
                                                         <&clk IMX8MP_SYS_PLL1_800M>,
-                                                        <&clk IMX8MP_SYS_PLL2_500M>,
-                                                        <&clk IMX8MP_SYS_PLL1_800M>,
-                                                        <&clk IMX8MP_SYS_PLL1_800M>;
+                                                        <&clk IMX8MP_SYS_PLL2_500M>;
                                assigned-clock-rates = <0>, <0>,
                                                       <1000000000>,
                                                       <800000000>,
-                                                      <500000000>,
-                                                      <400000000>,
-                                                      <800000000>,
-                                                      <393216000>,
-                                                      <361267200>;
+                                                      <500000000>;
                        };
 
                        src: reset-controller@30390000 {