drm/mgag200: Split DPMS function into helpers
authorThomas Zimmermann <tzimmermann@suse.de>
Tue, 7 Jul 2020 08:24:08 +0000 (10:24 +0200)
committerThomas Zimmermann <tzimmermann@suse.de>
Tue, 14 Jul 2020 07:13:40 +0000 (09:13 +0200)
Of the DPMS code, only ON and OFF states are used. Simplify mode setting
by moving both into separate functions and removing the rest.

The original code busy waited in the middle of updating the screen state
in SEQ1. To simplify the procedure, the new code busy waits first and then
updates SEQ1 in one chunk.

The DPMS code also set the LUT before enabling the screen. The patch moves
this code into the simple-display pipe's enable function.

v2:
* comment on SEQ1 updates in commit message

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Reviewed-by: Lyude Paul <lyude@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200707082411.6583-5-tzimmermann@suse.de
drivers/gpu/drm/mgag200/mgag200_mode.c
drivers/gpu/drm/mgag200/mgag200_reg.h

index f0f8b7258f8c16dc8d0ad97edb76d602a50e99b4..05f8aa50b908676293b2e3d9808033617cbc36be 100644 (file)
@@ -1282,41 +1282,50 @@ static void mgag200_g200ev_set_hiprilvl(struct mga_device *mdev)
        WREG_ECRT(0x06, 0x00);
 }
 
-static void mga_crtc_dpms(struct drm_crtc *crtc, int mode)
+static void mgag200_enable_display(struct mga_device *mdev)
 {
-       struct drm_device *dev = crtc->dev;
-       struct mga_device *mdev = to_mga_device(dev);
-       u8 seq1 = 0, crtcext1 = 0;
+       u8 seq1, crtcext1;
 
-       switch (mode) {
-       case DRM_MODE_DPMS_ON:
-               seq1 = 0;
-               crtcext1 = 0;
-               mga_crtc_load_lut(crtc);
-               break;
-       case DRM_MODE_DPMS_STANDBY:
-               seq1 = 0x20;
-               crtcext1 = 0x10;
-               break;
-       case DRM_MODE_DPMS_SUSPEND:
-               seq1 = 0x20;
-               crtcext1 = 0x20;
-               break;
-       case DRM_MODE_DPMS_OFF:
-               seq1 = 0x20;
-               crtcext1 = 0x30;
-               break;
-       }
+       /*
+        * TODO: replace busy waiting with vblank IRQ; put
+        *       msleep(50) before changing SCROFF
+        */
+       mga_wait_vsync(mdev);
+       mga_wait_busy(mdev);
+
+       RREG_SEQ(0x01, seq1);
+       seq1 &= ~MGAREG_SEQ1_SCROFF;
+       WREG_SEQ(0x01, seq1);
+
+       msleep(20);
+
+       RREG_ECRT(0x01, crtcext1);
+       crtcext1 &= ~MGAREG_CRTCEXT1_VSYNCOFF;
+       crtcext1 &= ~MGAREG_CRTCEXT1_HSYNCOFF;
+       WREG_ECRT(0x01, crtcext1);
+}
 
-       WREG8(MGAREG_SEQ_INDEX, 0x01);
-       seq1 |= RREG8(MGAREG_SEQ_DATA) & ~0x20;
+static void mgag200_disable_display(struct mga_device *mdev)
+{
+       u8 seq1, crtcext1;
+
+       /*
+        * TODO: replace busy waiting with vblank IRQ; put
+        *       msleep(50) before changing SCROFF
+        */
        mga_wait_vsync(mdev);
        mga_wait_busy(mdev);
-       WREG8(MGAREG_SEQ_DATA, seq1);
+
+       RREG_SEQ(0x01, seq1);
+       seq1 |= MGAREG_SEQ1_SCROFF;
+       WREG_SEQ(0x01, seq1);
+
        msleep(20);
-       WREG8(MGAREG_CRTCEXT_INDEX, 0x01);
-       crtcext1 |= RREG8(MGAREG_CRTCEXT_DATA) & ~0x30;
-       WREG8(MGAREG_CRTCEXT_DATA, crtcext1);
+
+       RREG_ECRT(0x01, crtcext1);
+       crtcext1 |= MGAREG_CRTCEXT1_VSYNCOFF |
+                   MGAREG_CRTCEXT1_HSYNCOFF;
+       WREG_ECRT(0x01, crtcext1);
 }
 
 /*
@@ -1349,7 +1358,8 @@ static void mga_crtc_commit(struct drm_crtc *crtc)
                mga_g200wb_commit(crtc);
 
        WREG_SEQ(0, 0x3);
-       mga_crtc_dpms(crtc, DRM_MODE_DPMS_ON);
+       mga_crtc_load_lut(crtc);
+       mgag200_enable_display(mdev);
 }
 
 /*
@@ -1595,8 +1605,9 @@ static void
 mgag200_simple_display_pipe_disable(struct drm_simple_display_pipe *pipe)
 {
        struct drm_crtc *crtc = &pipe->crtc;
+       struct mga_device *mdev = to_mga_device(crtc->dev);
 
-       mga_crtc_dpms(crtc, DRM_MODE_DPMS_OFF);
+       mgag200_disable_display(mdev);
 }
 
 static int
index fb5da410804c12a15dd5939d052ece0d0f3df344..9f0be1878854f1d17d90fe3ba922144d2182190a 100644 (file)
 
 #define MGAREG_CRTCEXT0_OFFSET_MASK    GENMASK(5, 4)
 
+#define MGAREG_CRTCEXT1_VSYNCOFF       BIT(5)
+#define MGAREG_CRTCEXT1_HSYNCOFF       BIT(4)
+
 /* Cursor X and Y position */
 #define MGA_CURPOSXL 0x3c0c
 #define MGA_CURPOSXH 0x3c0d