drm/i915: pass dev_priv explicitly to ALPM_CTL

Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the ALPM_CTL register macro.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/96da9be36dc93fa9a7c329f25ff963e4998998c1.1714471597.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index e3221cd5bf579252d6934ea560d1c81dfb2b5ac4..e59de8500d83a2f0895c66769dc360c92492f329 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1812,7 +1812,7 @@ static void lnl_alpm_configure(struct intel_dp *intel_dp)
 
        alpm_ctl |= ALPM_CTL_ALPM_ENTRY_CHECK(psr->alpm_parameters.check_entry_lines);
 
-       intel_de_write(dev_priv, ALPM_CTL(cpu_transcoder), alpm_ctl);
+       intel_de_write(dev_priv, ALPM_CTL(dev_priv, cpu_transcoder), alpm_ctl);
 }
 
 static void intel_psr_enable_source(struct intel_dp *intel_dp,
@@ -2112,7 +2112,7 @@ static void intel_psr_disable_locked(struct intel_dp *intel_dp)
 
        /* Panel Replay on eDP is always using ALPM aux less. */
        if (intel_dp->psr.panel_replay_enabled && intel_dp_is_edp(intel_dp)) {
-               intel_de_rmw(dev_priv, ALPM_CTL(cpu_transcoder),
+               intel_de_rmw(dev_priv, ALPM_CTL(dev_priv, cpu_transcoder),
                             ALPM_CTL_ALPM_ENABLE |
                             ALPM_CTL_ALPM_AUX_LESS_ENABLE, 0);
 

diff --git a/drivers/gpu/drm/i915/display/intel_psr_regs.h b/drivers/gpu/drm/i915/display/intel_psr_regs.h
index a10cf5120efbf2d0f582db574e127891ff1da984..8d7f8408ef8e1fbd464ddd654e33fc01dce38d0e 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_psr_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_psr_regs.h
@@ -297,7 +297,7 @@
                                                  _SEL_FETCH_PLANE_BASE_1_A)
 
 #define _ALPM_CTL_A    0x60950
-#define ALPM_CTL(tran) _MMIO_TRANS2(dev_priv, tran, _ALPM_CTL_A)
+#define ALPM_CTL(dev_priv, tran)       _MMIO_TRANS2(dev_priv, tran, _ALPM_CTL_A)
 #define  ALPM_CTL_ALPM_ENABLE                          REG_BIT(31)
 #define  ALPM_CTL_ALPM_AUX_LESS_ENABLE                 REG_BIT(30)
 #define  ALPM_CTL_LOBF_ENABLE                          REG_BIT(29)