drm/amd/display: MST support for DPIA

[Why]
- DPIA MST slot registers are not programmed during payload
allocation and hence MST does not work with DPIA.
- HPD RX interrupts are not handled for DPIA.

[How]
- Added inbox command to program the MST slots whenever
  payload allocation happens for DPIA links.
- Added support for handling HPD RX interrupts

Signed-off-by: Meenakshikumar Somasundaram <meenakshikumar.somasundaram@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
index 9d33b00b7e27fde557ae6f911940447dac6ad13e..12e5470fa567ff330996d8ae0b1acce97dc00086 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -3750,6 +3750,60 @@ bool dc_process_dmub_set_config_async(struct dc *dc,
        return is_cmd_complete;
 }
 
+/**
+ *****************************************************************************
+ *  Function: dc_process_dmub_set_mst_slots
+ *
+ *  @brief
+ *             Submits mst slot allocation command to dmub via inbox message
+ *
+ *  @param
+ *             [in] dc: dc structure
+ *             [in] link_index: link index
+ *             [in] mst_alloc_slots: mst slots to be allotted
+ *             [out] mst_slots_in_use: mst slots in use returned in failure case
+ *
+ *     @return
+ *             DC_OK if successful, DC_ERROR if failure
+ *****************************************************************************
+ */
+enum dc_status dc_process_dmub_set_mst_slots(const struct dc *dc,
+                               uint32_t link_index,
+                               uint8_t mst_alloc_slots,
+                               uint8_t *mst_slots_in_use)
+{
+       union dmub_rb_cmd cmd = {0};
+       struct dc_dmub_srv *dmub_srv = dc->ctx->dmub_srv;
+
+       /* prepare MST_ALLOC_SLOTS command */
+       cmd.set_mst_alloc_slots.header.type = DMUB_CMD__DPIA;
+       cmd.set_mst_alloc_slots.header.sub_type = DMUB_CMD__DPIA_MST_ALLOC_SLOTS;
+
+       cmd.set_mst_alloc_slots.mst_slots_control.instance = dc->links[link_index]->ddc_hw_inst;
+       cmd.set_mst_alloc_slots.mst_slots_control.mst_alloc_slots = mst_alloc_slots;
+
+       if (!dc_dmub_srv_cmd_with_reply_data(dmub_srv, &cmd))
+               /* command is not processed by dmub */
+               return DC_ERROR_UNEXPECTED;
+
+       /* command processed by dmub, if ret_status is 1 */
+       if (cmd.set_config_access.header.ret_status != 1)
+               /* command processing error */
+               return DC_ERROR_UNEXPECTED;
+
+       /* command processed and we have a status of 2, mst not enabled in dpia */
+       if (cmd.set_mst_alloc_slots.mst_slots_control.immed_status == 2)
+               return DC_FAIL_UNSUPPORTED_1;
+
+       /* previously configured mst alloc and used slots did not match */
+       if (cmd.set_mst_alloc_slots.mst_slots_control.immed_status == 3) {
+               *mst_slots_in_use = cmd.set_mst_alloc_slots.mst_slots_control.mst_slots_in_use;
+               return DC_NOT_SUPPORTED;
+       }
+
+       return DC_OK;
+}
+
 /**
  * dc_disable_accelerated_mode - disable accelerated mode
  * @dc: dc structure

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
index 27b9ff98a569acb526289921df0808c9a93e43cf..2796bdd17de18d2c48e26e0cf8a8ab083bbab1f9 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
@@ -3499,6 +3499,20 @@ enum dc_status dc_link_allocate_mst_payload(struct pipe_ctx *pipe_ctx)
 
        ASSERT(proposed_table.stream_count > 0);
 
+       if (link->ep_type == DISPLAY_ENDPOINT_USB4_DPIA) {
+               static enum dc_status status;
+               uint8_t mst_alloc_slots = 0, prev_mst_slots_in_use = 0xFF;
+
+               for (i = 0; i < link->mst_stream_alloc_table.stream_count; i++)
+                       mst_alloc_slots += link->mst_stream_alloc_table.stream_allocations[i].slot_count;
+
+               status = dc_process_dmub_set_mst_slots(link->dc, link->link_index,
+                       mst_alloc_slots, &prev_mst_slots_in_use);
+               ASSERT(status == DC_OK);
+               DC_LOG_MST("dpia : status[%d]: alloc_slots[%d]: used_slots[%d]\n",
+                               status, mst_alloc_slots, prev_mst_slots_in_use);
+       }
+
        /* program DP source TX for payload */
 #if defined(CONFIG_DRM_AMD_DC_DCN)
        switch (dp_get_link_encoding_format(&link->cur_link_settings)) {
@@ -3842,6 +3856,20 @@ static enum dc_status deallocate_mst_payload(struct pipe_ctx *pipe_ctx)
 #endif
        }
 
+       if (link->ep_type == DISPLAY_ENDPOINT_USB4_DPIA) {
+               enum dc_status status;
+               uint8_t mst_alloc_slots = 0, prev_mst_slots_in_use = 0xFF;
+
+               for (i = 0; i < link->mst_stream_alloc_table.stream_count; i++)
+                       mst_alloc_slots += link->mst_stream_alloc_table.stream_allocations[i].slot_count;
+
+               status = dc_process_dmub_set_mst_slots(link->dc, link->link_index,
+                       mst_alloc_slots, &prev_mst_slots_in_use);
+               ASSERT(status != DC_NOT_SUPPORTED);
+               DC_LOG_MST("dpia : status[%d]: alloc_slots[%d]: used_slots[%d]\n",
+                               status, mst_alloc_slots, prev_mst_slots_in_use);
+       }
+
 #if defined(CONFIG_DRM_AMD_DC_DCN)
        switch (dp_get_link_encoding_format(&link->cur_link_settings)) {
        case DP_8b_10b_ENCODING:

diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h
index 33c4f74a0adde200d07deef05521d555b3c371cb..a5339796902ae844533e117f777c34f48587588c 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -1428,6 +1428,12 @@ bool dc_process_dmub_set_config_async(struct dc *dc,
                                uint32_t link_index,
                                struct set_config_cmd_payload *payload,
                                struct dmub_notification *notify);
+
+enum dc_status dc_process_dmub_set_mst_slots(const struct dc *dc,
+                               uint32_t link_index,
+                               uint8_t mst_alloc_slots,
+                               uint8_t *mst_slots_in_use);
+
 /*******************************************************************************
  * DSC Interfaces
  ******************************************************************************/

diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
index 48982bc3e2431dd743a0a540b735b92e7a364797..0293c58f0701f3233127ca92bab35617d5f24cd5 100644 (file)
--- a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
+++ b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
@@ -697,6 +697,7 @@ enum dmub_out_cmd_type {
 enum dmub_cmd_dpia_type {
        DMUB_CMD__DPIA_DIG1_DPIA_CONTROL = 0,
        DMUB_CMD__DPIA_SET_CONFIG_ACCESS = 1,
+       DMUB_CMD__DPIA_MST_ALLOC_SLOTS = 2,
 };
 
 #pragma pack(push, 1)
@@ -1071,6 +1072,24 @@ struct dmub_rb_cmd_set_config_access {
        struct dmub_cmd_set_config_control_data set_config_control; /* set config data */
 };
 
+/**
+ * Data passed from driver to FW in a DMUB_CMD__DPIA_MST_ALLOC_SLOTS command.
+ */
+struct dmub_cmd_mst_alloc_slots_control_data {
+       uint8_t mst_alloc_slots; /* mst slots to be allotted */
+       uint8_t instance; /* DPIA instance */
+       uint8_t immed_status; /* Immediate status returned as there is no outbox msg posted */
+       uint8_t mst_slots_in_use; /* returns slots in use for error cases */
+};
+
+/**
+ * DMUB command structure for SET_ command.
+ */
+struct dmub_rb_cmd_set_mst_alloc_slots {
+       struct dmub_cmd_header header; /* header */
+       struct dmub_cmd_mst_alloc_slots_control_data mst_slots_control; /* mst slots control */
+};
+
 /**
  * struct dmub_rb_cmd_dpphy_init - DPPHY init.
  */
@@ -2593,6 +2612,10 @@ union dmub_rb_cmd {
         * Definition of a DMUB_CMD__DPIA_SET_CONFIG_ACCESS command.
         */
        struct dmub_rb_cmd_set_config_access set_config_access;
+       /**
+        * Definition of a DMUB_CMD__DPIA_MST_ALLOC_SLOTS command.
+        */
+       struct dmub_rb_cmd_set_mst_alloc_slots set_mst_alloc_slots;
        /**
         * Definition of a DMUB_CMD__EDID_CEA command.
         */