ASoC: wm8904: configure sysclk/FLL automatically
authorMichael Walle <michael@walle.cc>
Fri, 8 Nov 2019 20:31:52 +0000 (21:31 +0100)
committerMark Brown <broonie@kernel.org>
Mon, 11 Nov 2019 19:42:56 +0000 (19:42 +0000)
This adds a new mode WM8904_CLK_AUTO which automatically enables the FLL
if a frequency different than the MCLK is set.

These additions make the codec work with the simple-card driver in
general and especially in systems where the MCLK doesn't match the
required clock.

Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Link: https://lore.kernel.org/r/20191108203152.19098-1-michael@walle.cc
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/codecs/wm8904.c
sound/soc/codecs/wm8904.h

index bcb3c9d5abf0c68df3b519024b9df52021e22fbf..2a7d23a5daa8de97c45a641d415ed58ce3d7f8d3 100644 (file)
@@ -1410,34 +1410,6 @@ static int wm8904_hw_params(struct snd_pcm_substream *substream,
        return 0;
 }
 
-
-static int wm8904_set_sysclk(struct snd_soc_dai *dai, int clk_id,
-                            unsigned int freq, int dir)
-{
-       struct snd_soc_component *component = dai->component;
-       struct wm8904_priv *priv = snd_soc_component_get_drvdata(component);
-
-       switch (clk_id) {
-       case WM8904_CLK_MCLK:
-               priv->sysclk_src = clk_id;
-               priv->mclk_rate = freq;
-               break;
-
-       case WM8904_CLK_FLL:
-               priv->sysclk_src = clk_id;
-               break;
-
-       default:
-               return -EINVAL;
-       }
-
-       dev_dbg(dai->dev, "Clock source is %d at %uHz\n", clk_id, freq);
-
-       wm8904_configure_clocking(component);
-
-       return 0;
-}
-
 static int wm8904_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
 {
        struct snd_soc_component *component = dai->component;
@@ -1824,6 +1796,50 @@ out:
        return 0;
 }
 
+static int wm8904_set_sysclk(struct snd_soc_dai *dai, int clk_id,
+                            unsigned int freq, int dir)
+{
+       struct snd_soc_component *component = dai->component;
+       struct wm8904_priv *priv = snd_soc_component_get_drvdata(component);
+       unsigned long mclk_freq;
+       int ret;
+
+       switch (clk_id) {
+       case WM8904_CLK_AUTO:
+               mclk_freq = clk_get_rate(priv->mclk);
+               /* enable FLL if a different sysclk is desired */
+               if (mclk_freq != freq) {
+                       priv->sysclk_src = WM8904_CLK_FLL;
+                       ret = wm8904_set_fll(dai, WM8904_FLL_MCLK,
+                                            WM8904_FLL_MCLK,
+                                            mclk_freq, freq);
+                       if (ret)
+                               return ret;
+                       break;
+               }
+               clk_id = WM8904_CLK_MCLK;
+               /* fallthrough */
+
+       case WM8904_CLK_MCLK:
+               priv->sysclk_src = clk_id;
+               priv->mclk_rate = freq;
+               break;
+
+       case WM8904_CLK_FLL:
+               priv->sysclk_src = clk_id;
+               break;
+
+       default:
+               return -EINVAL;
+       }
+
+       dev_dbg(dai->dev, "Clock source is %d at %uHz\n", clk_id, freq);
+
+       wm8904_configure_clocking(component);
+
+       return 0;
+}
+
 static int wm8904_digital_mute(struct snd_soc_dai *codec_dai, int mute)
 {
        struct snd_soc_component *component = codec_dai->component;
index c1bca52f9927bb9faba12868d68ede025e94827f..de6340446b1f7aad838eaaa3060b77445cd92208 100644 (file)
@@ -10,6 +10,7 @@
 #ifndef _WM8904_H
 #define _WM8904_H
 
+#define WM8904_CLK_AUTO 0
 #define WM8904_CLK_MCLK 1
 #define WM8904_CLK_FLL  2