arm64: dts: renesas: rcar-gen3e: Add Cortex-A57 2 GHz opps
authorGeert Uytterhoeven <geert+renesas@glider.be>
Thu, 14 Oct 2021 08:36:07 +0000 (10:36 +0200)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Thu, 14 Oct 2021 08:46:46 +0000 (10:46 +0200)
Add operating points for running the Cortex-A57 CPU cores on R-Car
H3e-2G, M3e-2G, and M3Ne-2G at 2 GHz.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/08a0f27f50b8ad4a78c05186190bebcfb364fe8f.1634200489.git.geert+renesas@glider.be
arch/arm64/boot/dts/renesas/r8a779m1.dtsi
arch/arm64/boot/dts/renesas/r8a779m3.dtsi
arch/arm64/boot/dts/renesas/r8a779m5.dtsi

index 0e9b04469b83c661bcec7abcbc0f7ed8fa4a7007..b6e855f52adf99b58259fd15b1397a6e5382f995 100644 (file)
 / {
        compatible = "renesas,r8a779m1", "renesas,r8a7795";
 };
+
+&cluster0_opp {
+       opp-2000000000 {
+               opp-hz = /bits/ 64 <2000000000>;
+               opp-microvolt = <960000>;
+               clock-latency-ns = <300000>;
+               turbo-mode;
+       };
+};
index 65bb6188ccf5470aea3bdff65d120cda26bee2e8..6cff38a6d20b47ea5a477ccafacd851cf6d7aafa 100644 (file)
 / {
        compatible = "renesas,r8a779m3", "renesas,r8a77961";
 };
+
+&cluster0_opp {
+       opp-2000000000 {
+               opp-hz = /bits/ 64 <2000000000>;
+               opp-microvolt = <960000>;
+               clock-latency-ns = <300000>;
+               turbo-mode;
+       };
+};
index f0ef765f6cf8731980e2f6e7585eb2a5e01ad24c..8c9c0557fe77ed7df64a7cb49e11955b5db0e546 100644 (file)
 / {
        compatible = "renesas,r8a779m5", "renesas,r8a77965";
 };
+
+&cluster0_opp {
+       opp-2000000000 {
+               opp-hz = /bits/ 64 <2000000000>;
+               opp-microvolt = <960000>;
+               clock-latency-ns = <300000>;
+               turbo-mode;
+       };
+};