arm64: dts: freescale: rename gw7905 to gw75xx
authorTim Harvey <tharvey@gateworks.com>
Wed, 28 Aug 2024 17:36:51 +0000 (10:36 -0700)
committerShawn Guo <shawnguo@kernel.org>
Wed, 4 Sep 2024 09:36:22 +0000 (17:36 +0800)
The GW7905 was renamed to GW7500 before production release.

While we typically do not change compatibles, the GW7905 was never
released before its product name was changed to a GW7500.

The use the the 'xx' wildcard is to denote the fact that this
device-tree can support range of board models from GW7500 to GW7599 as
has been done historically with the Gateworks baseboards to support
various build customizatoins based on the same PCB.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm64/boot/dts/freescale/Makefile
arch/arm64/boot/dts/freescale/imx8mm-venice-gw75xx-0x.dts [new file with mode: 0644]
arch/arm64/boot/dts/freescale/imx8mm-venice-gw75xx.dtsi [new file with mode: 0644]
arch/arm64/boot/dts/freescale/imx8mm-venice-gw7905-0x.dts [deleted file]
arch/arm64/boot/dts/freescale/imx8mm-venice-gw7905.dtsi [deleted file]
arch/arm64/boot/dts/freescale/imx8mp-venice-gw75xx-2x.dts [new file with mode: 0644]
arch/arm64/boot/dts/freescale/imx8mp-venice-gw75xx.dtsi [new file with mode: 0644]
arch/arm64/boot/dts/freescale/imx8mp-venice-gw7905-2x.dts [deleted file]
arch/arm64/boot/dts/freescale/imx8mp-venice-gw7905.dtsi [deleted file]

index d1ec757c688b32be37ffca9a8272ada9e3d8d4a6..52b6dfb24b48c9a1b97ed9ea867e0395d84ad5a3 100644 (file)
@@ -129,11 +129,11 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mm-var-som-symphony.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw71xx-0x.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw72xx-0x.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw73xx-0x.dtb
+dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw75xx-0x.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw7901.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw7902.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw7903.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw7904.dtb
-dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw7905-0x.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mm-verdin-nonwifi-dahlia.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mm-verdin-nonwifi-dev.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mm-verdin-nonwifi-mallow.dtb
@@ -185,7 +185,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw71xx-2x.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw72xx-2x.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw73xx-2x.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw74xx.dtb
-dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw7905-2x.dtb
+dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw75xx-2x.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-nonwifi-dahlia.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-nonwifi-dev.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-nonwifi-mallow.dtb
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw75xx-0x.dts b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw75xx-0x.dts
new file mode 100644 (file)
index 0000000..04f06a5
--- /dev/null
@@ -0,0 +1,28 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2023 Gateworks Corporation
+ */
+
+/dts-v1/;
+
+#include "imx8mm.dtsi"
+#include "imx8mm-venice-gw700x.dtsi"
+#include "imx8mm-venice-gw75xx.dtsi"
+
+/ {
+       model = "Gateworks Venice GW75xx-0x i.MX8MM Development Kit";
+       compatible = "gateworks,imx8mm-gw75xx-0x", "fsl,imx8mm";
+
+       chosen {
+               stdout-path = &uart2;
+       };
+};
+
+/* Disable SOM interfaces not used on baseboard */
+&fec1 {
+       status = "disabled";
+};
+
+&usdhc1 {
+       status = "disabled";
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw75xx.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw75xx.dtsi
new file mode 100644 (file)
index 0000000..5eb9200
--- /dev/null
@@ -0,0 +1,303 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2023 Gateworks Corporation
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/phy/phy-imx8-pcie.h>
+
+/ {
+       led-controller {
+               compatible = "gpio-leds";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_gpio_leds>;
+
+               led-0 {
+                       function = LED_FUNCTION_STATUS;
+                       color = <LED_COLOR_ID_GREEN>;
+                       gpios = <&gpio4 0 GPIO_ACTIVE_HIGH>;
+                       default-state = "on";
+                       linux,default-trigger = "heartbeat";
+               };
+
+               led-1 {
+                       function = LED_FUNCTION_STATUS;
+                       color = <LED_COLOR_ID_RED>;
+                       gpios = <&gpio4 2 GPIO_ACTIVE_HIGH>;
+                       default-state = "off";
+               };
+       };
+
+       pcie0_refclk: clock-pcie0 {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <100000000>;
+       };
+
+       pps {
+               compatible = "pps-gpio";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_pps>;
+               gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>;
+               status = "okay";
+       };
+
+       reg_usb2_vbus: regulator-usb2-vbus {
+               compatible = "regulator-fixed";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_reg_usb2_en>;
+               regulator-name = "usb2_vbus";
+               gpio = <&gpio1 8 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+       };
+
+       reg_usdhc2_vmmc: regulator-usdhc2 {
+               compatible = "regulator-fixed";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
+               regulator-name = "SD2_3P3V";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+       };
+};
+
+/* off-board header */
+&ecspi2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_spi2>;
+       cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
+       status = "okay";
+};
+
+&gpio1 {
+       gpio-line-names =
+               "", "", "", "",
+               "", "", "", "",
+               "", "", "", "",
+               "", "gpioa", "gpiob", "",
+               "", "", "", "",
+               "", "", "", "",
+               "", "", "", "",
+               "", "", "", "";
+};
+
+&gpio4 {
+       gpio-line-names =
+               "", "", "", "pci_usb_sel",
+               "", "", "", "pci_wdis#",
+               "", "", "", "",
+               "", "", "", "",
+               "", "", "", "",
+               "", "", "", "",
+               "", "", "", "",
+               "", "", "", "";
+};
+
+&gpio5 {
+       gpio-line-names =
+               "", "", "", "",
+               "gpioc", "gpiod", "", "",
+               "", "", "", "",
+               "", "", "", "",
+               "", "", "", "",
+               "", "", "", "",
+               "", "", "", "",
+               "", "", "", "";
+};
+
+&i2c2 {
+       clock-frequency = <400000>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c2>;
+       status = "okay";
+
+       eeprom@52 {
+               compatible = "atmel,24c32";
+               reg = <0x52>;
+               pagesize = <32>;
+       };
+};
+
+/* off-board header */
+&i2c3 {
+       clock-frequency = <400000>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c3>;
+       status = "okay";
+};
+
+&pcie_phy {
+       fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
+       fsl,clkreq-unsupported;
+       clocks = <&pcie0_refclk>;
+       clock-names = "ref";
+       status = "okay";
+};
+
+&pcie0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_pcie0>;
+       reset-gpio = <&gpio4 6 GPIO_ACTIVE_LOW>;
+       status = "okay";
+};
+
+/* GPS */
+&uart1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart1>;
+       status = "okay";
+};
+
+/* USB1 - Type C front panel SINK port J14 */
+&usbotg1 {
+       dr_mode = "peripheral";
+       status = "okay";
+};
+
+/* USB2 4-port USB3.0 HUB:
+ *  P1 - USBC connector (host only)
+ *  P2 - USB2 test connector
+ *  P3 - miniPCIe full card
+ *  P4 - miniPCIe half card
+ */
+&usbotg2 {
+       dr_mode = "host";
+       vbus-supply = <&reg_usb2_vbus>;
+       status = "okay";
+};
+
+/* microSD */
+&usdhc2 {
+       pinctrl-names = "default", "state_100mhz", "state_200mhz";
+       pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
+       pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
+       pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
+       cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
+       vmmc-supply = <&reg_usdhc2_vmmc>;
+       bus-width = <4>;
+       status = "okay";
+};
+
+&iomuxc {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_hog>;
+
+       pinctrl_hog: hoggrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_GPIO1_IO13_GPIO1_IO13      0x40000040 /* GPIOA */
+                       MX8MM_IOMUXC_GPIO1_IO14_GPIO1_IO14      0x40000040 /* GPIOB */
+                       MX8MM_IOMUXC_SAI1_RXD1_GPIO4_IO3        0x40000106 /* PCI_USBSEL */
+                       MX8MM_IOMUXC_SAI1_RXD5_GPIO4_IO7        0x40000106 /* PCIE_WDIS# */
+                       MX8MM_IOMUXC_SPDIF_EXT_CLK_GPIO5_IO5    0x40000040 /* GPIOD */
+                       MX8MM_IOMUXC_SPDIF_RX_GPIO5_IO4         0x40000040 /* GPIOC */
+               >;
+       };
+
+       pinctrl_gpio_leds: gpioledgrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_SAI1_RXFS_GPIO4_IO0        0x6     /* LEDG */
+                       MX8MM_IOMUXC_SAI1_RXD0_GPIO4_IO2        0x6     /* LEDR */
+               >;
+       };
+
+       pinctrl_i2c2: i2c2grp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL          0x400001c2
+                       MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA          0x400001c2
+               >;
+       };
+
+       pinctrl_i2c3: i2c3grp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL          0x400001c2
+                       MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA          0x400001c2
+               >;
+       };
+
+       pinctrl_pcie0: pciegrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_SAI1_RXD4_GPIO4_IO6        0x106
+               >;
+       };
+
+       pinctrl_pps: ppsgrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_SAI1_RXD3_GPIO4_IO5        0x106
+               >;
+       };
+
+       pinctrl_reg_usb2_en: regusb2grp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_GPIO1_IO08_GPIO1_IO8       0x6     /* USBHUB_RST# (ext p/u) */
+               >;
+       };
+
+       pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19     0x40
+               >;
+       };
+
+       pinctrl_spi2: spi2grp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK    0x140
+                       MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI    0x140
+                       MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO    0x140
+                       MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13      0x140
+               >;
+       };
+
+       pinctrl_uart1: uart1grp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX     0x140
+                       MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX     0x140
+               >;
+       };
+
+       pinctrl_usdhc2: usdhc2grp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK         0x190
+                       MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD         0x1d0
+                       MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0     0x1d0
+                       MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1     0x1d0
+                       MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2     0x1d0
+                       MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3     0x1d0
+                       MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT  0xc0
+               >;
+       };
+
+       pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK         0x194
+                       MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD         0x1d4
+                       MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0     0x1d4
+                       MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1     0x1d4
+                       MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2     0x1d4
+                       MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3     0x1d4
+                       MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT  0xc0
+               >;
+       };
+
+       pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK         0x196
+                       MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD         0x1d6
+                       MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0     0x1d6
+                       MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1     0x1d6
+                       MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2     0x1d6
+                       MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3     0x1d6
+                       MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT  0xc0
+               >;
+       };
+
+       pinctrl_usdhc2_gpio: usdhc2gpiogrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12        0x1c4
+               >;
+       };
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7905-0x.dts b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7905-0x.dts
deleted file mode 100644 (file)
index 914753f..0000000
+++ /dev/null
@@ -1,28 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright 2023 Gateworks Corporation
- */
-
-/dts-v1/;
-
-#include "imx8mm.dtsi"
-#include "imx8mm-venice-gw700x.dtsi"
-#include "imx8mm-venice-gw7905.dtsi"
-
-/ {
-       model = "Gateworks Venice GW7905-0x i.MX8MM Development Kit";
-       compatible = "gateworks,imx8mm-gw7905-0x", "fsl,imx8mm";
-
-       chosen {
-               stdout-path = &uart2;
-       };
-};
-
-/* Disable SOM interfaces not used on baseboard */
-&fec1 {
-       status = "disabled";
-};
-
-&usdhc1 {
-       status = "disabled";
-};
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7905.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7905.dtsi
deleted file mode 100644 (file)
index 5eb9200..0000000
+++ /dev/null
@@ -1,303 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright 2023 Gateworks Corporation
- */
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/phy/phy-imx8-pcie.h>
-
-/ {
-       led-controller {
-               compatible = "gpio-leds";
-               pinctrl-names = "default";
-               pinctrl-0 = <&pinctrl_gpio_leds>;
-
-               led-0 {
-                       function = LED_FUNCTION_STATUS;
-                       color = <LED_COLOR_ID_GREEN>;
-                       gpios = <&gpio4 0 GPIO_ACTIVE_HIGH>;
-                       default-state = "on";
-                       linux,default-trigger = "heartbeat";
-               };
-
-               led-1 {
-                       function = LED_FUNCTION_STATUS;
-                       color = <LED_COLOR_ID_RED>;
-                       gpios = <&gpio4 2 GPIO_ACTIVE_HIGH>;
-                       default-state = "off";
-               };
-       };
-
-       pcie0_refclk: clock-pcie0 {
-               compatible = "fixed-clock";
-               #clock-cells = <0>;
-               clock-frequency = <100000000>;
-       };
-
-       pps {
-               compatible = "pps-gpio";
-               pinctrl-names = "default";
-               pinctrl-0 = <&pinctrl_pps>;
-               gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>;
-               status = "okay";
-       };
-
-       reg_usb2_vbus: regulator-usb2-vbus {
-               compatible = "regulator-fixed";
-               pinctrl-names = "default";
-               pinctrl-0 = <&pinctrl_reg_usb2_en>;
-               regulator-name = "usb2_vbus";
-               gpio = <&gpio1 8 GPIO_ACTIVE_HIGH>;
-               enable-active-high;
-               regulator-min-microvolt = <5000000>;
-               regulator-max-microvolt = <5000000>;
-       };
-
-       reg_usdhc2_vmmc: regulator-usdhc2 {
-               compatible = "regulator-fixed";
-               pinctrl-names = "default";
-               pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
-               regulator-name = "SD2_3P3V";
-               regulator-min-microvolt = <3300000>;
-               regulator-max-microvolt = <3300000>;
-               gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
-               enable-active-high;
-       };
-};
-
-/* off-board header */
-&ecspi2 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_spi2>;
-       cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
-       status = "okay";
-};
-
-&gpio1 {
-       gpio-line-names =
-               "", "", "", "",
-               "", "", "", "",
-               "", "", "", "",
-               "", "gpioa", "gpiob", "",
-               "", "", "", "",
-               "", "", "", "",
-               "", "", "", "",
-               "", "", "", "";
-};
-
-&gpio4 {
-       gpio-line-names =
-               "", "", "", "pci_usb_sel",
-               "", "", "", "pci_wdis#",
-               "", "", "", "",
-               "", "", "", "",
-               "", "", "", "",
-               "", "", "", "",
-               "", "", "", "",
-               "", "", "", "";
-};
-
-&gpio5 {
-       gpio-line-names =
-               "", "", "", "",
-               "gpioc", "gpiod", "", "",
-               "", "", "", "",
-               "", "", "", "",
-               "", "", "", "",
-               "", "", "", "",
-               "", "", "", "",
-               "", "", "", "";
-};
-
-&i2c2 {
-       clock-frequency = <400000>;
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_i2c2>;
-       status = "okay";
-
-       eeprom@52 {
-               compatible = "atmel,24c32";
-               reg = <0x52>;
-               pagesize = <32>;
-       };
-};
-
-/* off-board header */
-&i2c3 {
-       clock-frequency = <400000>;
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_i2c3>;
-       status = "okay";
-};
-
-&pcie_phy {
-       fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
-       fsl,clkreq-unsupported;
-       clocks = <&pcie0_refclk>;
-       clock-names = "ref";
-       status = "okay";
-};
-
-&pcie0 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_pcie0>;
-       reset-gpio = <&gpio4 6 GPIO_ACTIVE_LOW>;
-       status = "okay";
-};
-
-/* GPS */
-&uart1 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_uart1>;
-       status = "okay";
-};
-
-/* USB1 - Type C front panel SINK port J14 */
-&usbotg1 {
-       dr_mode = "peripheral";
-       status = "okay";
-};
-
-/* USB2 4-port USB3.0 HUB:
- *  P1 - USBC connector (host only)
- *  P2 - USB2 test connector
- *  P3 - miniPCIe full card
- *  P4 - miniPCIe half card
- */
-&usbotg2 {
-       dr_mode = "host";
-       vbus-supply = <&reg_usb2_vbus>;
-       status = "okay";
-};
-
-/* microSD */
-&usdhc2 {
-       pinctrl-names = "default", "state_100mhz", "state_200mhz";
-       pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
-       pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
-       pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
-       cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
-       vmmc-supply = <&reg_usdhc2_vmmc>;
-       bus-width = <4>;
-       status = "okay";
-};
-
-&iomuxc {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_hog>;
-
-       pinctrl_hog: hoggrp {
-               fsl,pins = <
-                       MX8MM_IOMUXC_GPIO1_IO13_GPIO1_IO13      0x40000040 /* GPIOA */
-                       MX8MM_IOMUXC_GPIO1_IO14_GPIO1_IO14      0x40000040 /* GPIOB */
-                       MX8MM_IOMUXC_SAI1_RXD1_GPIO4_IO3        0x40000106 /* PCI_USBSEL */
-                       MX8MM_IOMUXC_SAI1_RXD5_GPIO4_IO7        0x40000106 /* PCIE_WDIS# */
-                       MX8MM_IOMUXC_SPDIF_EXT_CLK_GPIO5_IO5    0x40000040 /* GPIOD */
-                       MX8MM_IOMUXC_SPDIF_RX_GPIO5_IO4         0x40000040 /* GPIOC */
-               >;
-       };
-
-       pinctrl_gpio_leds: gpioledgrp {
-               fsl,pins = <
-                       MX8MM_IOMUXC_SAI1_RXFS_GPIO4_IO0        0x6     /* LEDG */
-                       MX8MM_IOMUXC_SAI1_RXD0_GPIO4_IO2        0x6     /* LEDR */
-               >;
-       };
-
-       pinctrl_i2c2: i2c2grp {
-               fsl,pins = <
-                       MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL          0x400001c2
-                       MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA          0x400001c2
-               >;
-       };
-
-       pinctrl_i2c3: i2c3grp {
-               fsl,pins = <
-                       MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL          0x400001c2
-                       MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA          0x400001c2
-               >;
-       };
-
-       pinctrl_pcie0: pciegrp {
-               fsl,pins = <
-                       MX8MM_IOMUXC_SAI1_RXD4_GPIO4_IO6        0x106
-               >;
-       };
-
-       pinctrl_pps: ppsgrp {
-               fsl,pins = <
-                       MX8MM_IOMUXC_SAI1_RXD3_GPIO4_IO5        0x106
-               >;
-       };
-
-       pinctrl_reg_usb2_en: regusb2grp {
-               fsl,pins = <
-                       MX8MM_IOMUXC_GPIO1_IO08_GPIO1_IO8       0x6     /* USBHUB_RST# (ext p/u) */
-               >;
-       };
-
-       pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
-               fsl,pins = <
-                       MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19     0x40
-               >;
-       };
-
-       pinctrl_spi2: spi2grp {
-               fsl,pins = <
-                       MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK    0x140
-                       MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI    0x140
-                       MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO    0x140
-                       MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13      0x140
-               >;
-       };
-
-       pinctrl_uart1: uart1grp {
-               fsl,pins = <
-                       MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX     0x140
-                       MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX     0x140
-               >;
-       };
-
-       pinctrl_usdhc2: usdhc2grp {
-               fsl,pins = <
-                       MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK         0x190
-                       MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD         0x1d0
-                       MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0     0x1d0
-                       MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1     0x1d0
-                       MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2     0x1d0
-                       MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3     0x1d0
-                       MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT  0xc0
-               >;
-       };
-
-       pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
-               fsl,pins = <
-                       MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK         0x194
-                       MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD         0x1d4
-                       MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0     0x1d4
-                       MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1     0x1d4
-                       MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2     0x1d4
-                       MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3     0x1d4
-                       MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT  0xc0
-               >;
-       };
-
-       pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
-               fsl,pins = <
-                       MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK         0x196
-                       MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD         0x1d6
-                       MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0     0x1d6
-                       MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1     0x1d6
-                       MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2     0x1d6
-                       MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3     0x1d6
-                       MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT  0xc0
-               >;
-       };
-
-       pinctrl_usdhc2_gpio: usdhc2gpiogrp {
-               fsl,pins = <
-                       MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12        0x1c4
-               >;
-       };
-};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw75xx-2x.dts b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw75xx-2x.dts
new file mode 100644 (file)
index 0000000..7ca68df
--- /dev/null
@@ -0,0 +1,28 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2023 Gateworks Corporation
+ */
+
+/dts-v1/;
+
+#include "imx8mp.dtsi"
+#include "imx8mp-venice-gw702x.dtsi"
+#include "imx8mp-venice-gw75xx.dtsi"
+
+/ {
+       model = "Gateworks Venice GW75xx-2x i.MX8MP Development Kit";
+       compatible = "gateworks,imx8mp-gw75xx-2x", "fsl,imx8mp";
+
+       chosen {
+               stdout-path = &uart2;
+       };
+};
+
+/* Disable SOM interfaces not used on baseboard */
+&eqos {
+       status = "disabled";
+};
+
+&usdhc1 {
+       status = "disabled";
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw75xx.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw75xx.dtsi
new file mode 100644 (file)
index 0000000..0d40cb0
--- /dev/null
@@ -0,0 +1,309 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2023 Gateworks Corporation
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/phy/phy-imx8-pcie.h>
+
+/ {
+       led-controller {
+               compatible = "gpio-leds";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_gpio_leds>;
+
+               led-0 {
+                       function = LED_FUNCTION_STATUS;
+                       color = <LED_COLOR_ID_GREEN>;
+                       gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>;
+                       default-state = "on";
+                       linux,default-trigger = "heartbeat";
+               };
+
+               led-1 {
+                       function = LED_FUNCTION_STATUS;
+                       color = <LED_COLOR_ID_RED>;
+                       gpios = <&gpio4 27 GPIO_ACTIVE_HIGH>;
+                       default-state = "off";
+               };
+       };
+
+       pcie0_refclk: pcie0-refclk {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <100000000>;
+       };
+
+       pps {
+               compatible = "pps-gpio";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_pps>;
+               gpios = <&gpio4 21 GPIO_ACTIVE_HIGH>;
+               status = "okay";
+       };
+
+       reg_usb2_vbus: regulator-usb2-vbus {
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_reg_usb2_en>;
+               compatible = "regulator-fixed";
+               regulator-name = "usb2_vbus";
+               gpio = <&gpio4 12 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+       };
+
+       reg_usdhc2_vmmc: regulator-usdhc2 {
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
+               compatible = "regulator-fixed";
+               regulator-name = "SD2_3P3V";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+       };
+};
+
+/* off-board header */
+&ecspi2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_spi2>;
+       cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
+       status = "okay";
+};
+
+&gpio4 {
+       gpio-line-names =
+               "", "", "", "",
+               "", "", "", "",
+               "", "", "", "",
+               "", "gpioa", "", "",
+               "", "", "", "",
+               "", "", "", "",
+               "", "", "", "",
+               "", "", "", "";
+};
+
+&gpio4 {
+       gpio-line-names =
+               "", "gpiod", "", "",
+               "gpiob", "gpioc", "", "",
+               "", "", "", "",
+               "", "", "", "",
+               "", "", "", "",
+               "", "", "", "",
+               "", "", "pci_usb_sel", "",
+               "pci_wdis#", "", "", "";
+};
+
+&i2c2 {
+       clock-frequency = <400000>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c2>;
+       status = "okay";
+
+       eeprom@52 {
+               compatible = "atmel,24c32";
+               reg = <0x52>;
+               pagesize = <32>;
+       };
+};
+
+/* off-board header */
+&i2c3 {
+       clock-frequency = <400000>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c3>;
+       status = "okay";
+};
+
+&pcie_phy {
+       fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
+       fsl,clkreq-unsupported;
+       clocks = <&pcie0_refclk>;
+       clock-names = "ref";
+       status = "okay";
+};
+
+&pcie {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_pcie0>;
+       reset-gpio = <&gpio4 29 GPIO_ACTIVE_LOW>;
+       status = "okay";
+};
+
+/* GPS */
+&uart1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart1>;
+       status = "okay";
+};
+
+/* USB1 - Type C front panel SINK port J14 */
+&usb3_0 {
+       status = "okay";
+};
+
+&usb3_phy0 {
+       status = "okay";
+};
+
+&usb_dwc3_0 {
+       dr_mode = "peripheral";
+       status = "okay";
+};
+
+/* USB2 4-port USB3.0 HUB:
+ *  P1 - USBC connector (host only)
+ *  P2 - USB2 test connector
+ *  P3 - miniPCIe full card
+ *  P4 - miniPCIe half card
+ */
+&usb3_phy1 {
+       vbus-supply = <&reg_usb2_vbus>;
+       status = "okay";
+};
+
+&usb3_1 {
+       fsl,permanently-attached;
+       fsl,disable-port-power-control;
+       status = "okay";
+};
+
+&usb_dwc3_1 {
+       dr_mode = "host";
+       status = "okay";
+};
+
+/* microSD */
+&usdhc2 {
+       pinctrl-names = "default", "state_100mhz", "state_200mhz";
+       pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
+       pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
+       pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
+       cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
+       vmmc-supply = <&reg_usdhc2_vmmc>;
+       bus-width = <4>;
+       status = "okay";
+};
+
+&iomuxc {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_hog>;
+
+       pinctrl_hog: hoggrp {
+               fsl,pins = <
+                       MX8MP_IOMUXC_GPIO1_IO13__GPIO1_IO13     0x40000040 /* GPIOA */
+                       MX8MP_IOMUXC_SAI1_RXC__GPIO4_IO01       0x40000040 /* GPIOD */
+                       MX8MP_IOMUXC_SAI1_RXD2__GPIO4_IO04      0x40000040 /* GPIOB */
+                       MX8MP_IOMUXC_SAI1_RXD3__GPIO4_IO05      0x40000040 /* GPIOC */
+                       MX8MP_IOMUXC_SAI2_TXD0__GPIO4_IO26      0x40000106 /* PCI_USBSEL */
+                       MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28      0x40000106 /* PCI_WDIS# */
+               >;
+       };
+
+       pinctrl_gpio_leds: gpioledgrp {
+               fsl,pins = <
+                       MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22       0x6     /* LEDG */
+                       MX8MP_IOMUXC_SAI2_MCLK__GPIO4_IO27      0x6     /* LEDR */
+               >;
+       };
+
+       pinctrl_i2c2: i2c2grp {
+               fsl,pins = <
+                       MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL         0x400001c2
+                       MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA         0x400001c2
+               >;
+       };
+
+       pinctrl_i2c3: i2c3grp {
+               fsl,pins = <
+                       MX8MP_IOMUXC_I2C3_SCL__I2C3_SCL         0x400001c2
+                       MX8MP_IOMUXC_I2C3_SDA__I2C3_SDA         0x400001c2
+               >;
+       };
+
+       pinctrl_pcie0: pciegrp {
+               fsl,pins = <
+                       MX8MP_IOMUXC_SAI3_RXC__GPIO4_IO29       0x106
+               >;
+       };
+
+       pinctrl_pps: ppsgrp {
+               fsl,pins = <
+                       MX8MP_IOMUXC_SAI2_RXFS__GPIO4_IO21      0x106
+               >;
+       };
+
+       pinctrl_reg_usb2_en: regusb2grp {
+               fsl,pins = <
+                       MX8MP_IOMUXC_SAI1_TXD0__GPIO4_IO12      0x6 /* USBHUB_RST# (ext p/u) */
+               >;
+       };
+
+       pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
+               fsl,pins = <
+                       MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19    0x40
+               >;
+       };
+
+       pinctrl_spi2: spi2grp {
+               fsl,pins = <
+                       MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK   0x140
+                       MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI   0x140
+                       MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO   0x140
+                       MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13     0x140
+               >;
+       };
+
+       pinctrl_uart1: uart1grp {
+               fsl,pins = <
+                       MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX    0x140
+                       MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX    0x140
+               >;
+       };
+
+       pinctrl_usdhc2: usdhc2grp {
+               fsl,pins = <
+                       MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK                0x190
+                       MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD                0x1d0
+                       MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0            0x1d0
+                       MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1            0x1d0
+                       MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2            0x1d0
+                       MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3            0x1d0
+                       MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT         0xc0
+               >;
+       };
+
+       pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
+               fsl,pins = <
+                       MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK                0x194
+                       MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD                0x1d4
+                       MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0            0x1d4
+                       MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1            0x1d4
+                       MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2            0x1d4
+                       MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3            0x1d4
+                       MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT         0xc0
+               >;
+       };
+
+       pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
+               fsl,pins = <
+                       MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK                0x196
+                       MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD                0x1d6
+                       MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0            0x1d6
+                       MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1            0x1d6
+                       MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2            0x1d6
+                       MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3            0x1d6
+                       MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT         0xc0
+               >;
+       };
+
+       pinctrl_usdhc2_gpio: usdhc2gpiogrp {
+               fsl,pins = <
+                       MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12               0x1c4
+               >;
+       };
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw7905-2x.dts b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw7905-2x.dts
deleted file mode 100644 (file)
index 4a1bbbb..0000000
+++ /dev/null
@@ -1,28 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright 2023 Gateworks Corporation
- */
-
-/dts-v1/;
-
-#include "imx8mp.dtsi"
-#include "imx8mp-venice-gw702x.dtsi"
-#include "imx8mp-venice-gw7905.dtsi"
-
-/ {
-       model = "Gateworks Venice GW7905-2x i.MX8MP Development Kit";
-       compatible = "gateworks,imx8mp-gw7905-2x", "fsl,imx8mp";
-
-       chosen {
-               stdout-path = &uart2;
-       };
-};
-
-/* Disable SOM interfaces not used on baseboard */
-&eqos {
-       status = "disabled";
-};
-
-&usdhc1 {
-       status = "disabled";
-};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw7905.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw7905.dtsi
deleted file mode 100644 (file)
index 0d40cb0..0000000
+++ /dev/null
@@ -1,309 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright 2023 Gateworks Corporation
- */
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/phy/phy-imx8-pcie.h>
-
-/ {
-       led-controller {
-               compatible = "gpio-leds";
-               pinctrl-names = "default";
-               pinctrl-0 = <&pinctrl_gpio_leds>;
-
-               led-0 {
-                       function = LED_FUNCTION_STATUS;
-                       color = <LED_COLOR_ID_GREEN>;
-                       gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>;
-                       default-state = "on";
-                       linux,default-trigger = "heartbeat";
-               };
-
-               led-1 {
-                       function = LED_FUNCTION_STATUS;
-                       color = <LED_COLOR_ID_RED>;
-                       gpios = <&gpio4 27 GPIO_ACTIVE_HIGH>;
-                       default-state = "off";
-               };
-       };
-
-       pcie0_refclk: pcie0-refclk {
-               compatible = "fixed-clock";
-               #clock-cells = <0>;
-               clock-frequency = <100000000>;
-       };
-
-       pps {
-               compatible = "pps-gpio";
-               pinctrl-names = "default";
-               pinctrl-0 = <&pinctrl_pps>;
-               gpios = <&gpio4 21 GPIO_ACTIVE_HIGH>;
-               status = "okay";
-       };
-
-       reg_usb2_vbus: regulator-usb2-vbus {
-               pinctrl-names = "default";
-               pinctrl-0 = <&pinctrl_reg_usb2_en>;
-               compatible = "regulator-fixed";
-               regulator-name = "usb2_vbus";
-               gpio = <&gpio4 12 GPIO_ACTIVE_HIGH>;
-               enable-active-high;
-               regulator-min-microvolt = <5000000>;
-               regulator-max-microvolt = <5000000>;
-       };
-
-       reg_usdhc2_vmmc: regulator-usdhc2 {
-               pinctrl-names = "default";
-               pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
-               compatible = "regulator-fixed";
-               regulator-name = "SD2_3P3V";
-               regulator-min-microvolt = <3300000>;
-               regulator-max-microvolt = <3300000>;
-               gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
-               enable-active-high;
-       };
-};
-
-/* off-board header */
-&ecspi2 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_spi2>;
-       cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
-       status = "okay";
-};
-
-&gpio4 {
-       gpio-line-names =
-               "", "", "", "",
-               "", "", "", "",
-               "", "", "", "",
-               "", "gpioa", "", "",
-               "", "", "", "",
-               "", "", "", "",
-               "", "", "", "",
-               "", "", "", "";
-};
-
-&gpio4 {
-       gpio-line-names =
-               "", "gpiod", "", "",
-               "gpiob", "gpioc", "", "",
-               "", "", "", "",
-               "", "", "", "",
-               "", "", "", "",
-               "", "", "", "",
-               "", "", "pci_usb_sel", "",
-               "pci_wdis#", "", "", "";
-};
-
-&i2c2 {
-       clock-frequency = <400000>;
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_i2c2>;
-       status = "okay";
-
-       eeprom@52 {
-               compatible = "atmel,24c32";
-               reg = <0x52>;
-               pagesize = <32>;
-       };
-};
-
-/* off-board header */
-&i2c3 {
-       clock-frequency = <400000>;
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_i2c3>;
-       status = "okay";
-};
-
-&pcie_phy {
-       fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
-       fsl,clkreq-unsupported;
-       clocks = <&pcie0_refclk>;
-       clock-names = "ref";
-       status = "okay";
-};
-
-&pcie {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_pcie0>;
-       reset-gpio = <&gpio4 29 GPIO_ACTIVE_LOW>;
-       status = "okay";
-};
-
-/* GPS */
-&uart1 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_uart1>;
-       status = "okay";
-};
-
-/* USB1 - Type C front panel SINK port J14 */
-&usb3_0 {
-       status = "okay";
-};
-
-&usb3_phy0 {
-       status = "okay";
-};
-
-&usb_dwc3_0 {
-       dr_mode = "peripheral";
-       status = "okay";
-};
-
-/* USB2 4-port USB3.0 HUB:
- *  P1 - USBC connector (host only)
- *  P2 - USB2 test connector
- *  P3 - miniPCIe full card
- *  P4 - miniPCIe half card
- */
-&usb3_phy1 {
-       vbus-supply = <&reg_usb2_vbus>;
-       status = "okay";
-};
-
-&usb3_1 {
-       fsl,permanently-attached;
-       fsl,disable-port-power-control;
-       status = "okay";
-};
-
-&usb_dwc3_1 {
-       dr_mode = "host";
-       status = "okay";
-};
-
-/* microSD */
-&usdhc2 {
-       pinctrl-names = "default", "state_100mhz", "state_200mhz";
-       pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
-       pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
-       pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
-       cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
-       vmmc-supply = <&reg_usdhc2_vmmc>;
-       bus-width = <4>;
-       status = "okay";
-};
-
-&iomuxc {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_hog>;
-
-       pinctrl_hog: hoggrp {
-               fsl,pins = <
-                       MX8MP_IOMUXC_GPIO1_IO13__GPIO1_IO13     0x40000040 /* GPIOA */
-                       MX8MP_IOMUXC_SAI1_RXC__GPIO4_IO01       0x40000040 /* GPIOD */
-                       MX8MP_IOMUXC_SAI1_RXD2__GPIO4_IO04      0x40000040 /* GPIOB */
-                       MX8MP_IOMUXC_SAI1_RXD3__GPIO4_IO05      0x40000040 /* GPIOC */
-                       MX8MP_IOMUXC_SAI2_TXD0__GPIO4_IO26      0x40000106 /* PCI_USBSEL */
-                       MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28      0x40000106 /* PCI_WDIS# */
-               >;
-       };
-
-       pinctrl_gpio_leds: gpioledgrp {
-               fsl,pins = <
-                       MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22       0x6     /* LEDG */
-                       MX8MP_IOMUXC_SAI2_MCLK__GPIO4_IO27      0x6     /* LEDR */
-               >;
-       };
-
-       pinctrl_i2c2: i2c2grp {
-               fsl,pins = <
-                       MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL         0x400001c2
-                       MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA         0x400001c2
-               >;
-       };
-
-       pinctrl_i2c3: i2c3grp {
-               fsl,pins = <
-                       MX8MP_IOMUXC_I2C3_SCL__I2C3_SCL         0x400001c2
-                       MX8MP_IOMUXC_I2C3_SDA__I2C3_SDA         0x400001c2
-               >;
-       };
-
-       pinctrl_pcie0: pciegrp {
-               fsl,pins = <
-                       MX8MP_IOMUXC_SAI3_RXC__GPIO4_IO29       0x106
-               >;
-       };
-
-       pinctrl_pps: ppsgrp {
-               fsl,pins = <
-                       MX8MP_IOMUXC_SAI2_RXFS__GPIO4_IO21      0x106
-               >;
-       };
-
-       pinctrl_reg_usb2_en: regusb2grp {
-               fsl,pins = <
-                       MX8MP_IOMUXC_SAI1_TXD0__GPIO4_IO12      0x6 /* USBHUB_RST# (ext p/u) */
-               >;
-       };
-
-       pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
-               fsl,pins = <
-                       MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19    0x40
-               >;
-       };
-
-       pinctrl_spi2: spi2grp {
-               fsl,pins = <
-                       MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK   0x140
-                       MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI   0x140
-                       MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO   0x140
-                       MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13     0x140
-               >;
-       };
-
-       pinctrl_uart1: uart1grp {
-               fsl,pins = <
-                       MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX    0x140
-                       MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX    0x140
-               >;
-       };
-
-       pinctrl_usdhc2: usdhc2grp {
-               fsl,pins = <
-                       MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK                0x190
-                       MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD                0x1d0
-                       MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0            0x1d0
-                       MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1            0x1d0
-                       MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2            0x1d0
-                       MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3            0x1d0
-                       MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT         0xc0
-               >;
-       };
-
-       pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
-               fsl,pins = <
-                       MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK                0x194
-                       MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD                0x1d4
-                       MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0            0x1d4
-                       MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1            0x1d4
-                       MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2            0x1d4
-                       MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3            0x1d4
-                       MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT         0xc0
-               >;
-       };
-
-       pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
-               fsl,pins = <
-                       MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK                0x196
-                       MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD                0x1d6
-                       MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0            0x1d6
-                       MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1            0x1d6
-                       MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2            0x1d6
-                       MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3            0x1d6
-                       MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT         0xc0
-               >;
-       };
-
-       pinctrl_usdhc2_gpio: usdhc2gpiogrp {
-               fsl,pins = <
-                       MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12               0x1c4
-               >;
-       };
-};