iommu/arm-smmu-v3, acpi: Add temporary Cavium SMMU-V3 IORT model number definitions
authorRobert Richter <rrichter@cavium.com>
Thu, 22 Jun 2017 19:20:54 +0000 (21:20 +0200)
committerWill Deacon <will.deacon@arm.com>
Fri, 23 Jun 2017 16:58:03 +0000 (17:58 +0100)
The model number is already defined in acpica and we are actually
waiting for the acpi maintainers to include it:

 https://github.com/acpica/acpica/commit/d00a4eb86e64

Adding those temporary definitions until the change makes it into
include/acpi/actbl2.h. Once that is done this patch can be reverted.

Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Robert Richter <rrichter@cavium.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
drivers/acpi/arm64/iort.c
drivers/iommu/arm-smmu-v3.c

index c5fecf97ee2f52bd11188a0cd2295bd82d5d02db..da225710b009eaaf570a21ca1e089597fc47ed0d 100644 (file)
 #define IORT_IOMMU_TYPE                ((1 << ACPI_IORT_NODE_SMMU) |   \
                                (1 << ACPI_IORT_NODE_SMMU_V3))
 
+/* Until ACPICA headers cover IORT rev. C */
+#ifndef ACPI_IORT_SMMU_V3_CAVIUM_CN99XX
+#define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX                0x2
+#endif
+
 struct iort_its_msi_chip {
        struct list_head        list;
        struct fwnode_handle    *fw_node;
index 884b1a49a52a24b87dc548dce3122ce2fd687c6d..da481d53e09b930e00b3effe034c61d75d0dd94d 100644 (file)
 #define MSI_IOVA_BASE                  0x8000000
 #define MSI_IOVA_LENGTH                        0x100000
 
+/* Until ACPICA headers cover IORT rev. C */
+#ifndef ACPI_IORT_SMMU_V3_CAVIUM_CN99XX
+#define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX                0x2
+#endif
+
 static bool disable_bypass;
 module_param_named(disable_bypass, disable_bypass, bool, S_IRUGO);
 MODULE_PARM_DESC(disable_bypass,