ASoC: SOF: Intel: initial support for Tiger Lake.
authorPan Xiuli <xiuli.pan@linux.intel.com>
Thu, 15 Aug 2019 15:57:47 +0000 (10:57 -0500)
committerMark Brown <broonie@kernel.org>
Thu, 15 Aug 2019 17:13:00 +0000 (18:13 +0100)
Add Kconfig, PCI ID and chip info for Tiger Lake platform.

Note that the core mask is different from previous platforms, only
Core0 can be controlled by the host. Additional patches will be
required for multi-core functionality.

Signed-off-by: Pan Xiuli <xiuli.pan@linux.intel.com>
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Link: https://lore.kernel.org/r/20190815155749.29304-3-pierre-louis.bossart@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/sof/intel/Kconfig
sound/soc/sof/intel/cnl.c
sound/soc/sof/intel/hda.h
sound/soc/sof/sof-pci-dev.c

index 545071afbe18afd77185bdf1f1d55fc82948ddf2..0dc5da661b6188401f950eb68777a3652f534755 100644 (file)
@@ -27,6 +27,7 @@ config SND_SOC_SOF_INTEL_PCI
        select SND_SOC_SOF_ICELAKE     if SND_SOC_SOF_ICELAKE_SUPPORT
        select SND_SOC_SOF_COMETLAKE_LP if SND_SOC_SOF_COMETLAKE_LP_SUPPORT
        select SND_SOC_SOF_COMETLAKE_H if SND_SOC_SOF_COMETLAKE_H_SUPPORT
+       select SND_SOC_SOF_TIGERLAKE   if SND_SOC_SOF_TIGERLAKE_SUPPORT
        help
          This option is not user-selectable but automagically handled by
          'select' statements at a higher level
@@ -212,6 +213,21 @@ config SND_SOC_SOF_COMETLAKE_H_SUPPORT
          Say Y if you have such a device.
          If unsure select "N".
 
+config SND_SOC_SOF_TIGERLAKE_SUPPORT
+       bool "SOF support for Tigerlake"
+       help
+          This adds support for Sound Open Firmware for Intel(R) platforms
+          using the Tigerlake processors.
+          Say Y if you have such a device.
+          If unsure select "N".
+
+config SND_SOC_SOF_TIGERLAKE
+       tristate
+       select SND_SOC_SOF_HDA_COMMON
+       help
+          This option is not user-selectable but automagically handled by
+         'select' statements at a higher level
+
 config SND_SOC_SOF_HDA_COMMON
        tristate
        select SND_SOC_SOF_INTEL_COMMON
index 6d7d9c93252c814a8aefa228e0078f7908ad3b46..5de281fcc1221f6d9add946ed5b3240b975ae5b7 100644 (file)
@@ -295,3 +295,19 @@ const struct sof_intel_dsp_desc icl_chip_info = {
        .ssp_base_offset = CNL_SSP_BASE_OFFSET,
 };
 EXPORT_SYMBOL(icl_chip_info);
+
+const struct sof_intel_dsp_desc tgl_chip_info = {
+       /* Tigerlake */
+       .cores_num = 4,
+       .init_core_mask = 1,
+       .cores_mask = HDA_DSP_CORE_MASK(0),
+       .ipc_req = CNL_DSP_REG_HIPCIDR,
+       .ipc_req_mask = CNL_DSP_REG_HIPCIDR_BUSY,
+       .ipc_ack = CNL_DSP_REG_HIPCIDA,
+       .ipc_ack_mask = CNL_DSP_REG_HIPCIDA_DONE,
+       .ipc_ctl = CNL_DSP_REG_HIPCCTL,
+       .rom_init_timeout       = 300,
+       .ssp_count = ICL_SSP_COUNT,
+       .ssp_base_offset = CNL_SSP_BASE_OFFSET,
+};
+EXPORT_SYMBOL(tgl_chip_info);
index 6db3dcbab3bdff6ff14c2175b6ec6ee8a166a9b2..cbb431f7835dddfec6897c0beee2841d66a3d690 100644 (file)
@@ -599,5 +599,6 @@ extern const struct sof_intel_dsp_desc apl_chip_info;
 extern const struct sof_intel_dsp_desc cnl_chip_info;
 extern const struct sof_intel_dsp_desc skl_chip_info;
 extern const struct sof_intel_dsp_desc icl_chip_info;
+extern const struct sof_intel_dsp_desc tgl_chip_info;
 
 #endif
index 6fd3df7c57a3ad23a84b69461708b15a814edd1d..9f92504ad5b44e241b5c89b685222d8c7ddce2c5 100644 (file)
@@ -203,6 +203,24 @@ static const struct sof_dev_desc kbl_desc = {
 };
 #endif
 
+#if IS_ENABLED(CONFIG_SND_SOC_SOF_TIGERLAKE)
+static const struct sof_dev_desc tgl_desc = {
+       .machines               = snd_soc_acpi_intel_tgl_machines,
+       .resindex_lpe_base      = 0,
+       .resindex_pcicfg_base   = -1,
+       .resindex_imr_base      = -1,
+       .irqindex_host_ipc      = -1,
+       .resindex_dma_base      = -1,
+       .chip_info = &tgl_chip_info,
+       .default_fw_path = "intel/sof",
+       .default_tplg_path = "intel/sof-tplg",
+       .nocodec_fw_filename = "sof-tgl.ri",
+       .nocodec_tplg_filename = "sof-tgl-nocodec.tplg",
+       .ops = &sof_cnl_ops,
+       .arch_ops = &sof_xtensa_arch_ops
+};
+#endif
+
 static const struct dev_pm_ops sof_pci_pm = {
        SET_SYSTEM_SLEEP_PM_OPS(snd_sof_suspend, snd_sof_resume)
        SET_RUNTIME_PM_OPS(snd_sof_runtime_suspend, snd_sof_runtime_resume,
@@ -384,6 +402,10 @@ static const struct pci_device_id sof_pci_ids[] = {
 #if IS_ENABLED(CONFIG_SND_SOC_SOF_COMETLAKE_H)
        { PCI_DEVICE(0x8086, 0x06c8),
                .driver_data = (unsigned long)&cml_desc},
+#endif
+#if IS_ENABLED(CONFIG_SND_SOC_SOF_TIGERLAKE)
+       { PCI_DEVICE(0x8086, 0xa0c8),
+               .driver_data = (unsigned long)&tgl_desc},
 #endif
        { 0, }
 };