MAINTAINERS: add entry for T-HEAD RISC-V SoC
authorJisheng Zhang <jszhang@kernel.org>
Sat, 17 Jun 2023 16:15:28 +0000 (00:15 +0800)
committerConor Dooley <conor.dooley@microchip.com>
Sat, 17 Jun 2023 18:04:08 +0000 (19:04 +0100)
Currently, I would like to maintain the T-HEAD RISC-V SoC support.

Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
MAINTAINERS

index e0ad886d316324d8bdd25befb706cd2fda82d9f9..68805b09654f03d4b8070941f631309d630ac986 100644 (file)
@@ -18162,6 +18162,14 @@ F:     drivers/perf/riscv_pmu.c
 F:     drivers/perf/riscv_pmu_legacy.c
 F:     drivers/perf/riscv_pmu_sbi.c
 
+RISC-V THEAD SoC SUPPORT
+M:     Jisheng Zhang <jszhang@kernel.org>
+M:     Guo Ren <guoren@kernel.org>
+M:     Fu Wei <wefu@redhat.com>
+L:     linux-riscv@lists.infradead.org
+S:     Maintained
+F:     arch/riscv/boot/dts/thead/
+
 RNBD BLOCK DRIVERS
 M:     Md. Haris Iqbal <haris.iqbal@ionos.com>
 M:     Jack Wang <jinpu.wang@ionos.com>