arm64: dts: qcom: sc7280: Fixup the cpufreq node

Fixup the register regions used by the cpufreq node on SC7280 SoC to
support per core L3 DCVS.

Fixes: 7dbd121a2c58 ("arm64: dts: qcom: sc7280: Add cpufreq hw node")
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/1627581885-32165-4-git-send-email-sibis@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index b5a5685193c42df8f886f002c1c063954a8c9cc7..dbbeb3a94a6dec42b4c2b860d8470915c600c445 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -1795,9 +1795,9 @@
 
                cpufreq_hw: cpufreq@18591000 {
                        compatible = "qcom,cpufreq-epss";
-                       reg = <0 0x18591000 0 0x1000>,
-                             <0 0x18592000 0 0x1000>,
-                             <0 0x18593000 0 0x1000>;
+                       reg = <0 0x18591100 0 0x900>,
+                             <0 0x18592100 0 0x900>,
+                             <0 0x18593100 0 0x900>;
                        clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>;
                        clock-names = "xo", "alternate";
                        #freq-domain-cells = <1>;