drm/i915/wm: Use intel_display structure in DPKGC code

Use intel_display for DPKGC code wherever we can. While we are
at it also use intel_de_rmw instead of intel_uncore_rmw as we
really don't need the internal uncore_rmw_function.

Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241203084706.2126189-3-suraj.kandpal@intel.com

diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index df961cb8d51fca18c1aa93935e1b3301e9d1e43f..4e46567f135948d624e550b10e6ba40f348ebc70 100644 (file)
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -2857,11 +2857,12 @@ static int skl_wm_add_affected_planes(struct intel_atomic_state *state,
 static void
 skl_program_dpkgc_latency(struct drm_i915_private *i915, bool enable_dpkgc)
 {
+       struct intel_display *display = to_intel_display(&i915->drm);
        u32 max_latency = LNL_PKG_C_LATENCY_MASK;
        u32 clear, val;
        u32 added_wake_time = 0;
 
-       if (DISPLAY_VER(i915) < 20)
+       if (DISPLAY_VER(display) < 20)
                return;
 
        if (enable_dpkgc) {
@@ -2869,14 +2870,14 @@ skl_program_dpkgc_latency(struct drm_i915_private *i915, bool enable_dpkgc)
                if (max_latency == 0)
                        max_latency = LNL_PKG_C_LATENCY_MASK;
                added_wake_time = DSB_EXE_TIME +
-                       i915->display.sagv.block_time_us;
+                       display->sagv.block_time_us;
        }
 
        clear = LNL_ADDED_WAKE_TIME_MASK | LNL_PKG_C_LATENCY_MASK;
        val = REG_FIELD_PREP(LNL_PKG_C_LATENCY_MASK, max_latency) |
                REG_FIELD_PREP(LNL_ADDED_WAKE_TIME_MASK, added_wake_time);
 
-       intel_uncore_rmw(&i915->uncore, LNL_PKG_C_LATENCY, clear, val);
+       intel_de_rmw(display, LNL_PKG_C_LATENCY, clear, val);
 }
 
 static int