KVM: nVMX: Reload APIC access page on nested VM-Exit only if necessary

Defer reloading L1's APIC page by logging the need for a reload and
processing it during nested VM-Exit instead of unconditionally reloading
the APIC page on nested VM-Exit.  This eliminates a TLB flush on the
majority of VM-Exits as the APIC page rarely needs to be reloaded.

Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
Message-Id: <20200320212833.3507-28-sean.j.christopherson@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

diff --git a/arch/x86/kvm/vmx/nested.c b/arch/x86/kvm/vmx/nested.c
index deddf0f0f6e70a28f8a830140d56c1a80939c231..a7a526a212921f533a7162abe97eb15ab428f589 100644 (file)
--- a/arch/x86/kvm/vmx/nested.c
+++ b/arch/x86/kvm/vmx/nested.c
@@ -4346,11 +4346,10 @@ void nested_vmx_vmexit(struct kvm_vcpu *vcpu, u32 exit_reason,
        kvm_vcpu_unmap(vcpu, &vmx->nested.pi_desc_map, true);
        vmx->nested.pi_desc = NULL;
 
-       /*
-        * We are now running in L2, mmu_notifier will force to reload the
-        * page's hpa for L2 vmcs. Need to reload it for L1 before entering L1.
-        */
-       kvm_make_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu);
+       if (vmx->nested.reload_vmcs01_apic_access_page) {
+               vmx->nested.reload_vmcs01_apic_access_page = false;
+               kvm_make_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu);
+       }
 
        if ((exit_reason != -1) && (enable_shadow_vmcs || vmx->nested.hv_evmcs))
                vmx->nested.need_vmcs12_to_shadow_sync = true;

diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
index d958cee52f411e7832a5bb973c3f3f713e2b01dd..4739b780c74ecbc1fb27f52a9cd8a8ef1670c812 100644 (file)
--- a/arch/x86/kvm/vmx/vmx.c
+++ b/arch/x86/kvm/vmx/vmx.c
@@ -6142,10 +6142,14 @@ void vmx_set_virtual_apic_mode(struct kvm_vcpu *vcpu)
 
 static void vmx_set_apic_access_page_addr(struct kvm_vcpu *vcpu, hpa_t hpa)
 {
-       if (!is_guest_mode(vcpu)) {
-               vmcs_write64(APIC_ACCESS_ADDR, hpa);
-               vmx_flush_tlb_current(vcpu);
+       /* Defer reload until vmcs01 is the current VMCS. */
+       if (is_guest_mode(vcpu)) {
+               to_vmx(vcpu)->nested.reload_vmcs01_apic_access_page = true;
+               return;
        }
+
+       vmcs_write64(APIC_ACCESS_ADDR, hpa);
+       vmx_flush_tlb_current(vcpu);
 }
 
 static void vmx_hwapic_isr_update(struct kvm_vcpu *vcpu, int max_isr)

diff --git a/arch/x86/kvm/vmx/vmx.h b/arch/x86/kvm/vmx/vmx.h
index 4c7b0713b438a9903c220f537ff7e12cf7d34b8c..31d7252df16353f8b099d1479b605c3125ff3166 100644 (file)
--- a/arch/x86/kvm/vmx/vmx.h
+++ b/arch/x86/kvm/vmx/vmx.h
@@ -136,6 +136,7 @@ struct nested_vmx {
        bool vmcs02_initialized;
 
        bool change_vmcs01_virtual_apic_mode;
+       bool reload_vmcs01_apic_access_page;
 
        /*
         * Enlightened VMCS has been enabled. It does not mean that L1 has to