arm64: dts: qcom: sc7280: Add edp_out port and HPD lines

Like dp_out, we should have defined edp_out in sc7280.dtsi so we don't
need to do this in the board files.

Like dp_hot_plug_det, we should define edp_hot_plug_det in
sc7280.dtsi.

We should set the default pinctrl for edp_hot_plug_det in
sc7280.dtsi. NOTE: this is _unlike_ the dp_hot_plug_det. It is
reasonable that in some boards the dedicated DP Hot Plug Detect will
not be hooked up in favor of Type C mechanisms. This is unlike eDP
where the Hot Plug Detect line (which functions as "panel ready" in
eDP) is highly likely to be used by boards.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220202132301.v3.7.Ic84bb69c45be2fccf50e3bd17b845fe20eec624c@changeid

diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 19d990b06e8ee7b423c00fd941792cba883eee2f..269cf722d20f37d318f92c8df22549a5f846df58 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -3012,6 +3012,8 @@
 
                        mdss_edp: edp@aea0000 {
                                compatible = "qcom,sc7280-edp";
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&edp_hot_plug_det>;
 
                                reg = <0 0xaea0000 0 0x200>,
                                      <0 0xaea0200 0 0x200>,
@@ -3054,12 +3056,18 @@
                                ports {
                                        #address-cells = <1>;
                                        #size-cells = <0>;
+
                                        port@0 {
                                                reg = <0>;
                                                edp_in: endpoint {
                                                        remote-endpoint = <&dpu_intf5_out>;
                                                };
                                        };
+
+                                       port@1 {
+                                               reg = <1>;
+                                               edp_out: endpoint { };
+                                       };
                                };
 
                                edp_opp_table: opp-table {
@@ -3279,6 +3287,11 @@
                                bias-disable;
                        };
 
+                       edp_hot_plug_det: edp-hot-plug-det {
+                               pins = "gpio60";
+                               function = "edp_hot";
+                       };
+
                        pcie1_clkreq_n: pcie1-clkreq-n {
                                pins = "gpio79";
                                function = "pcie1_clkreqn";