drm/amd/pm: Expose smu_v13_0_6 caps
authorAsad Kamal <asad.kamal@amd.com>
Mon, 17 Mar 2025 06:37:37 +0000 (14:37 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 7 Apr 2025 19:18:35 +0000 (15:18 -0400)
Expose smu_v13_0_6 caps by moving it to common header

Signed-off-by: Asad Kamal <asad.kamal@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.h

index 9264dc33ee7e940c92a7a5a3dd29a4f329cc09ed..f8489ebbd2ad9c1e3133d6ae3cec2bef74f3bc47 100644 (file)
@@ -101,24 +101,6 @@ MODULE_FIRMWARE("amdgpu/smu_13_0_14.bin");
 #define MCA_BANK_IPID(_ip, _hwid, _type) \
        [AMDGPU_MCA_IP_##_ip] = { .hwid = _hwid, .mcatype = _type, }
 
-#define SMU_CAP(x) SMU_13_0_6_CAPS_##x
-
-enum smu_v13_0_6_caps {
-       SMU_CAP(DPM),
-       SMU_CAP(DPM_POLICY),
-       SMU_CAP(OTHER_END_METRICS),
-       SMU_CAP(SET_UCLK_MAX),
-       SMU_CAP(PCIE_METRICS),
-       SMU_CAP(MCA_DEBUG_MODE),
-       SMU_CAP(PER_INST_METRICS),
-       SMU_CAP(CTF_LIMIT),
-       SMU_CAP(RMA_MSG),
-       SMU_CAP(ACA_SYND),
-       SMU_CAP(SDMA_RESET),
-       SMU_CAP(STATIC_METRICS),
-       SMU_CAP(ALL),
-};
-
 struct mca_bank_ipid {
        enum amdgpu_mca_ip ip;
        uint16_t hwid;
@@ -299,8 +281,8 @@ static inline void smu_v13_0_6_cap_clear(struct smu_context *smu,
        dpm_context->caps &= ~BIT_ULL(cap);
 }
 
-static inline bool smu_v13_0_6_cap_supported(struct smu_context *smu,
-                                            enum smu_v13_0_6_caps cap)
+bool smu_v13_0_6_cap_supported(struct smu_context *smu,
+                              enum smu_v13_0_6_caps cap)
 {
        struct smu_13_0_dpm_context *dpm_context = smu->smu_dpm.dpm_context;
 
index 83745909e5644d1a2509ea4121cf9ec74a7a9ee1..f28b1401fc76c77d50f7b788ee965a2a26cc0366 100644 (file)
@@ -26,6 +26,7 @@
 #define SMU_13_0_6_UMD_PSTATE_GFXCLK_LEVEL 0x2
 #define SMU_13_0_6_UMD_PSTATE_SOCCLK_LEVEL 0x4
 #define SMU_13_0_6_UMD_PSTATE_MCLK_LEVEL 0x2
+#define SMU_CAP(x) SMU_13_0_6_CAPS_##x
 
 typedef enum {
 /*0*/   METRICS_VERSION_V0                  = 0,
@@ -51,6 +52,23 @@ struct PPTable_t {
        bool Init;
 };
 
+enum smu_v13_0_6_caps {
+       SMU_CAP(DPM),
+       SMU_CAP(DPM_POLICY),
+       SMU_CAP(OTHER_END_METRICS),
+       SMU_CAP(SET_UCLK_MAX),
+       SMU_CAP(PCIE_METRICS),
+       SMU_CAP(MCA_DEBUG_MODE),
+       SMU_CAP(PER_INST_METRICS),
+       SMU_CAP(CTF_LIMIT),
+       SMU_CAP(RMA_MSG),
+       SMU_CAP(ACA_SYND),
+       SMU_CAP(SDMA_RESET),
+       SMU_CAP(STATIC_METRICS),
+       SMU_CAP(ALL),
+};
+
 extern void smu_v13_0_6_set_ppt_funcs(struct smu_context *smu);
+bool smu_v13_0_6_cap_supported(struct smu_context *smu, enum smu_v13_0_6_caps cap);
 
 #endif