drm/i915/display/dp: Compute VRR state in atomic_check

This forces a complete modeset if vrr drm crtc state goes
from enabled to disabled and vice versa.
This patch also computes vrr state variables from the mode timings
and based on the vrr property set by userspace as well as hardware's
vrr capability.

v2:
*Rebase
v3:
* Vmin = max (vtotal, vmin) (Manasi)
v4:
* set crtc_state->vrr.enable = 0 for disable request
v5:
* drm_dbg_kms, squash crtc states def patch (Jani N)
v6:
* Move vrr modeset check to separate function (Jani N)
v7:
* Ville's fixes - vmin, vmax rename, fix rounding dir
* Add pipeline full, flipline to crtc state
* Pass conn state to vrr_compute_config (Ville)

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210122232647.22688-6-manasi.d.navare@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 6051a5cabfef5309f592073be1ecde85d9a2fd92..8cee2b1c8d786f4749b5827154706d4fe495fa50 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -58,6 +58,7 @@
 #include "display/intel_sdvo.h"
 #include "display/intel_tv.h"
 #include "display/intel_vdsc.h"
+#include "display/intel_vrr.h"
 
 #include "gem/i915_gem_object.h"
 
@@ -11319,6 +11320,12 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
 
        PIPE_CONF_CHECK_I(mst_master_transcoder);
 
+       PIPE_CONF_CHECK_BOOL(vrr.enable);
+       PIPE_CONF_CHECK_I(vrr.vmin);
+       PIPE_CONF_CHECK_I(vrr.vmax);
+       PIPE_CONF_CHECK_I(vrr.flipline);
+       PIPE_CONF_CHECK_I(vrr.pipeline_full);
+
 #undef PIPE_CONF_CHECK_X
 #undef PIPE_CONF_CHECK_I
 #undef PIPE_CONF_CHECK_BOOL
@@ -12476,6 +12483,8 @@ static int intel_atomic_check(struct drm_device *dev,
                        new_crtc_state->uapi.mode_changed = true;
        }
 
+       intel_vrr_check_modeset(state);
+
        ret = drm_atomic_helper_check_modeset(dev, &state->base);
        if (ret)
                goto fail;

diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 927a8aeae3246d54ec7357d3b8ec22fd7e240a93..b5bac4c81de1454c18434ae64c1b1b5b2d4836c5 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1151,6 +1151,13 @@ struct intel_crtc_state {
        struct intel_dsb *dsb;
 
        u32 psr2_man_track_ctl;
+
+       /* Variable Refresh Rate state */
+       struct {
+               bool enable;
+               u8 pipeline_full;
+               u16 flipline, vmin, vmax;
+       } vrr;
 };
 
 enum intel_pipe_crc_source {

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index e6efa0fc31eafe2751091a8f8c5809bf8721fdb4..6c1aaaf587c2465e2de2f2cea540d0d9b20a72cc 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1827,6 +1827,7 @@ intel_dp_compute_config(struct intel_encoder *encoder,
        if (!HAS_DDI(dev_priv))
                intel_dp_set_clock(encoder, pipe_config);
 
+       intel_vrr_compute_config(pipe_config, conn_state);
        intel_psr_compute_config(intel_dp, pipe_config);
        intel_dp_drrs_compute_config(intel_dp, pipe_config, output_bpp,
                                     constant_n);

diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index b0503edbfdfe7e9deadaa35b48e518874b0eabc0..346ea3c16cc878146f1cede4ccc9854270b3c7d4 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -29,3 +29,73 @@ bool intel_vrr_is_capable(struct drm_connector *connector)
                drm_dp_sink_can_do_video_without_timing_msa(intel_dp->dpcd) &&
                info->monitor_range.max_vfreq - info->monitor_range.min_vfreq > 10;
 }
+
+void
+intel_vrr_check_modeset(struct intel_atomic_state *state)
+{
+       int i;
+       struct intel_crtc_state *old_crtc_state, *new_crtc_state;
+       struct intel_crtc *crtc;
+
+       for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
+                                           new_crtc_state, i) {
+               if (new_crtc_state->uapi.vrr_enabled !=
+                   old_crtc_state->uapi.vrr_enabled)
+                       new_crtc_state->uapi.mode_changed = true;
+       }
+}
+
+void
+intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
+                        struct drm_connector_state *conn_state)
+{
+       struct intel_connector *connector =
+               to_intel_connector(conn_state->connector);
+       struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
+       const struct drm_display_info *info = &connector->base.display_info;
+       int vmin, vmax;
+
+       if (!intel_vrr_is_capable(&connector->base))
+               return;
+
+       if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE)
+               return;
+
+       if (!crtc_state->uapi.vrr_enabled)
+               return;
+
+       vmin = DIV_ROUND_UP(adjusted_mode->crtc_clock * 1000,
+                           adjusted_mode->crtc_htotal * info->monitor_range.max_vfreq);
+       vmax = adjusted_mode->crtc_clock * 1000 /
+               (adjusted_mode->crtc_htotal * info->monitor_range.min_vfreq);
+
+       vmin = max_t(int, vmin, adjusted_mode->crtc_vtotal);
+       vmax = max_t(int, vmax, adjusted_mode->crtc_vtotal);
+
+       if (vmin >= vmax)
+               return;
+
+       /*
+        * flipline determines the min vblank length the hardware will
+        * generate, and flipline>=vmin+1, hence we reduce vmin by one
+        * to make sure we can get the actual min vblank length.
+        */
+       crtc_state->vrr.vmin = vmin - 1;
+       crtc_state->vrr.vmax = vmax;
+       crtc_state->vrr.enable = true;
+
+       crtc_state->vrr.flipline = crtc_state->vrr.vmin + 1;
+
+       /*
+        * FIXME: s/4/framestart_delay+1/ to get consistent
+        * earliest/latest points for register latching regardless
+        * of the framestart_delay used?
+        *
+        * FIXME: this really needs the extra scanline to provide consistent
+        * behaviour for all framestart_delay values. Otherwise with
+        * framestart_delay==3 we will end up extending the min vblank by
+        * one extra line.
+        */
+       crtc_state->vrr.pipeline_full =
+               min(255, crtc_state->vrr.vmin - adjusted_mode->crtc_vdisplay - 4 - 1);
+}

diff --git a/drivers/gpu/drm/i915/display/intel_vrr.h b/drivers/gpu/drm/i915/display/intel_vrr.h
index 8102de494e2aeead2294a7007e7afb2aab334333..992b9c58c0d6eed4b3f5c5dd9602a155e150c27a 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_vrr.h
+++ b/drivers/gpu/drm/i915/display/intel_vrr.h
@@ -9,7 +9,15 @@
 #include <linux/types.h>
 
 struct drm_connector;
+struct drm_connector_state;
+struct intel_atomic_state;
+struct intel_crtc;
+struct intel_crtc_state;
+struct intel_dp;
 
 bool intel_vrr_is_capable(struct drm_connector *connector);
+void intel_vrr_check_modeset(struct intel_atomic_state *state);
+void intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
+                             struct drm_connector_state *conn_state);
 
 #endif /* __INTEL_VRR_H__ */