Add a helper to get a mask of IPs which support user queues.
Use this in the INFO IOCTL to get the IP mask to replace
the current code.
Reviewed-by: Prike Liang <Prike.Liang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
}
}
- if (adev->userq_funcs[AMDGPU_HW_IP_GFX])
- dev_info->userq_ip_mask |= (1 << AMDGPU_HW_IP_GFX);
- if (adev->userq_funcs[AMDGPU_HW_IP_COMPUTE])
- dev_info->userq_ip_mask |= (1 << AMDGPU_HW_IP_COMPUTE);
- if (adev->userq_funcs[AMDGPU_HW_IP_DMA])
- dev_info->userq_ip_mask |= (1 << AMDGPU_HW_IP_DMA);
+ dev_info->userq_ip_mask = amdgpu_userqueue_get_supported_ip_mask(adev);
ret = copy_to_user(out, dev_info,
min((size_t)size, sizeof(*dev_info))) ? -EFAULT : 0;
#include "amdgpu_userqueue.h"
#include "amdgpu_userq_fence.h"
+u32 amdgpu_userqueue_get_supported_ip_mask(struct amdgpu_device *adev)
+{
+ int i;
+ u32 userq_ip_mask = 0;
+
+ for (i = 0; i < AMDGPU_HW_IP_NUM; i++) {
+ if (adev->userq_funcs[i])
+ userq_ip_mask |= (1 << i);
+ }
+
+ return userq_ip_mask;
+}
+
static void
amdgpu_userqueue_cleanup(struct amdgpu_userq_mgr *uq_mgr,
struct amdgpu_usermode_queue *queue,
struct amdgpu_db_info *db_info,
struct drm_file *filp);
+u32 amdgpu_userqueue_get_supported_ip_mask(struct amdgpu_device *adev);
+
int amdgpu_userq_suspend(struct amdgpu_device *adev);
int amdgpu_userq_resume(struct amdgpu_device *adev);