-~~~~~~~~~~~~~~~~~~~~~~~~~
-Amiga joystick extensions
-~~~~~~~~~~~~~~~~~~~~~~~~~
+~~~~~~~~~~~~~~~
+Amiga joysticks
+~~~~~~~~~~~~~~~
-Amiga 4-joystick parport extension
-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Amiga 4-joystick parallel port extension
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Parallel port pins:
-
===== ======== ==== ==========
Pin Meaning Pin Meaning
===== ======== ==== ==========
-------------------------------------------------------------------------------
-======== === ==== ==== ====== ========================================
+======== === ==== ==== ====== ===========================================
NAME rev ADDR type chip Description
-======== === ==== ==== ====== ========================================
-JOY0DAT 00A R Denise Joystick-mouse 0 data (left vert, horiz)
-JOY1DAT 00C R Denise Joystick-mouse 1 data (right vert,horiz)
-======== === ==== ==== ====== ========================================
+======== === ==== ==== ====== ===========================================
+JOY0DAT 00A R Denise Joystick-mouse 0 data (left vert., horiz.)
+JOY1DAT 00C R Denise Joystick-mouse 1 data (right vert., horiz.)
+======== === ==== ==== ====== ===========================================
These addresses each read a 16 bit register. These in turn
are loaded from the MDAT serial stream and are clocked in on
the rising edge of SCLK. MLD output is used to parallel load
- the external parallel-to-serial converter.This in turn is
+ the external parallel-to-serial converter. This in turn is
loaded with the 4 quadrature inputs from each of two game
controller ports (8 total) plus 8 miscellaneous control bits
which are new for LISA and can be read in upper 8 bits of
Register bits are as follows:
- - Mouse counter usage (pins 1,3 =Yclock, pins 2,4 =Xclock)
+ - Mouse counter usage (pins 1,3 =Yclock, pins 2,4 =Xclock)
======== === === === === === === === === ====== === === === === === === ===
BIT# 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
-------------------------------------------------------------------------------
-======= === ==== ==== ====== ========================================
+======= === ==== ==== ====== ===========================================
NAME rev ADDR type chip Description
-======= === ==== ==== ====== ========================================
-POT0DAT h 012 R Paula Pot counter data left pair (vert, horiz)
-POT1DAT h 014 R Paula Pot counter data right pair (vert,horiz)
-======= === ==== ==== ====== ========================================
+======= === ==== ==== ====== ===========================================
+POT0DAT h 012 R Paula Pot counter data left pair (vert., horiz.)
+POT1DAT h 014 R Paula Pot counter data right pair (vert., horiz.)
+======= === ==== ==== ====== ===========================================
These addresses each read a pair of 8 bit pot counters.
(4 counters total). The bit assignment for both
+-------+------+-----+-----+-------+
With normal (NTSC or PAL) horiz. line rate, the pots will
- give a full scale (FF) reading with about 500kohms in one
- frame time. With proportionally faster horiz line times,
+ give a full scale (FF) reading with about 500k ohm in one
+ frame time. With proportionally faster horiz. line times,
the counters will count proportionally faster.
This should be noted when doing variable beam displays.
This register controls a 4 bit bi-direction I/O port
that shares the same 4 pins as the 4 pot counters above.
- +-------+----------+---------------------------------------------+
- | BIT# | FUNCTION | DESCRIPTION |
- +=======+==========+=============================================+
- | 15 | OUTRY | Output enable for Paula pin 33 |
- +-------+----------+---------------------------------------------+
- | 14 | DATRY | I/O data Paula pin 33 |
- +-------+----------+---------------------------------------------+
- | 13 | OUTRX | Output enable for Paula pin 32 |
- +-------+----------+---------------------------------------------+
- | 12 | DATRX | I/O data Paula pin 32 |
- +-------+----------+---------------------------------------------+
- | 11 | OUTLY | Out put enable for Paula pin 36 |
- +-------+----------+---------------------------------------------+
- | 10 | DATLY | I/O data Paula pin 36 |
- +-------+----------+---------------------------------------------+
- | 09 | OUTLX | Output enable for Paula pin 35 |
- +-------+----------+---------------------------------------------+
- | 08 | DATLX | I/O data Paula pin 35 |
- +-------+----------+---------------------------------------------+
- | 07-01 | X | Not used |
- +-------+----------+---------------------------------------------+
- | 00 | START | Start pots (dump capacitors,start counters) |
- +-------+----------+---------------------------------------------+
+ +-------+----------+----------------------------------------------+
+ | BIT# | FUNCTION | DESCRIPTION |
+ +=======+==========+==============================================+
+ | 15 | OUTRY | Output enable for Paula pin 33 |
+ +-------+----------+----------------------------------------------+
+ | 14 | DATRY | I/O data Paula pin 33 |
+ +-------+----------+----------------------------------------------+
+ | 13 | OUTRX | Output enable for Paula pin 32 |
+ +-------+----------+----------------------------------------------+
+ | 12 | DATRX | I/O data Paula pin 32 |
+ +-------+----------+----------------------------------------------+
+ | 11 | OUTLY | Out put enable for Paula pin 36 |
+ +-------+----------+----------------------------------------------+
+ | 10 | DATLY | I/O data Paula pin 36 |
+ +-------+----------+----------------------------------------------+
+ | 09 | OUTLX | Output enable for Paula pin 35 |
+ +-------+----------+----------------------------------------------+
+ | 08 | DATLX | I/O data Paula pin 35 |
+ +-------+----------+----------------------------------------------+
+ | 07-01 | X | Not used |
+ +-------+----------+----------------------------------------------+
+ | 00 | START | Start pots (dump capacitors, start counters) |
+ +-------+----------+----------------------------------------------+