arm64: dts: imx8m: Add TMU phandle to calibration data in OCOTP

The TMU TASR, TCALIVn, TRIM registers must be explicitly programmed with
calibration values in OCOTP. Add the OCOTP calibration values phandle so
the TMU driver can perform this programming.

The MX8MM/MX8MN TMUv1 uses only one OCOTP cell, while MX8MP TMUv2 uses 4.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index 520253670c8f8a5d0a151658f68883f38c89d8c4..69b9703c1f83f47aa63dea5d529957470751dbbe 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -496,6 +496,8 @@
                                compatible = "fsl,imx8mm-tmu";
                                reg = <0x30260000 0x10000>;
                                clocks = <&clk IMX8MM_CLK_TMU_ROOT>;
+                               nvmem-cells = <&tmu_calib>;
+                               nvmem-cell-names = "calib";
                                #thermal-sensor-cells = <0>;
                        };
 
@@ -584,6 +586,10 @@
                                        reg = <0x10 4>;
                                };
 
+                               tmu_calib: calib@3c { /* 0x4f0 */
+                                       reg = <0x3c 4>;
+                               };
+
                                fec_mac_address: mac-address@90 { /* 0x640 */
                                        reg = <0x90 6>;
                                };

diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index 5f7852620fdf48ffa64c6661d44da985e1c72c1e..c5e6c20935c07ca2ddc09fca535b1ee0772ebb2d 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@ -498,6 +498,8 @@
                                compatible = "fsl,imx8mn-tmu", "fsl,imx8mm-tmu";
                                reg = <0x30260000 0x10000>;
                                clocks = <&clk IMX8MN_CLK_TMU_ROOT>;
+                               nvmem-cells = <&tmu_calib>;
+                               nvmem-cell-names = "calib";
                                #thermal-sensor-cells = <0>;
                        };
 
@@ -585,6 +587,10 @@
                                        reg = <0x10 4>;
                                };
 
+                               tmu_calib: calib@3c { /* 0x4f0 */
+                                       reg = <0x3c 4>;
+                               };
+
                                fec_mac_address: mac-address@90 { /* 0x640 */
                                        reg = <0x90 6>;
                                };

diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 58b466633f22dcd49685d39526daac390c77791c..dd2df83f6f27cecc3436f7091cacbbb4a2d3e533 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -380,6 +380,8 @@
                                compatible = "fsl,imx8mp-tmu";
                                reg = <0x30260000 0x10000>;
                                clocks = <&clk IMX8MP_CLK_TSENSOR_ROOT>;
+                               nvmem-cells = <&tmu_calib>;
+                               nvmem-cell-names = "calib";
                                #thermal-sensor-cells = <1>;
                        };
 
@@ -453,6 +455,10 @@
                                eth_mac2: mac-address@96 { /* 0x658 */
                                        reg = <0x96 6>;
                                };
+
+                               tmu_calib: calib@264 { /* 0xd90-0xdc0 */
+                                       reg = <0x264 0x10>;
+                               };
                        };
 
                        anatop: clock-controller@30360000 {