drm/i915/lnl: Extend C10/C20 phy
authorLucas De Marchi <lucas.demarchi@intel.com>
Thu, 26 Oct 2023 18:40:44 +0000 (11:40 -0700)
committerLucas De Marchi <lucas.demarchi@intel.com>
Sun, 29 Oct 2023 23:39:32 +0000 (16:39 -0700)
For Lunar Lake, DDI-A is connected to C10 PHY, while TC1-TC3 are connected
to C20 phy, like in Meteor Lake. Update the check in intel_is_c10phy()
accordingly.

This reverts the change in commit e388ae97e225 ("drm/i915/display:
Eliminate IS_METEORLAKE checks") that turned that into a display engine
version check. The phy <-> port connection is very SoC-specific and not
related to that version.

IS_LUNARLAKE() is defined to 0 in i915 as it's expected that the
(upcoming) xe driver is the one defining the platform, with i915 only
driving the display side.

Bspec: 70818
Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231026184045.1015655-2-lucas.demarchi@intel.com
drivers/gpu/drm/i915/display/intel_cx0_phy.c
drivers/gpu/drm/i915/i915_drv.h

index 7516abf8dba95e71317e4663b277bbf3ed25a487..cc87653bc476b2a40473b83bfabc6b0e75dd73cc 100644 (file)
@@ -31,7 +31,7 @@
 
 bool intel_is_c10phy(struct drm_i915_private *i915, enum phy phy)
 {
-       if (DISPLAY_VER_FULL(i915) == IP_VER(14, 0) && phy < PHY_C)
+       if ((IS_LUNARLAKE(i915) || IS_METEORLAKE(i915)) && phy < PHY_C)
                return true;
 
        return false;
index 20bbad165d76a0a0892b96299af9bb9514dfc31a..8e81974607f27740d575c8a5868f5f81eb11ee01 100644 (file)
@@ -560,6 +560,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 #define IS_DG2(i915)   IS_PLATFORM(i915, INTEL_DG2)
 #define IS_PONTEVECCHIO(i915) IS_PLATFORM(i915, INTEL_PONTEVECCHIO)
 #define IS_METEORLAKE(i915) IS_PLATFORM(i915, INTEL_METEORLAKE)
+#define IS_LUNARLAKE(i915) 0
 
 #define IS_DG2_G10(i915) \
        IS_SUBPLATFORM(i915, INTEL_DG2, INTEL_SUBPLATFORM_G10)