soc: qcom: geni: Add support for gpi dma

GPI DMA is one of the DMA modes supported on geni, this adds support to
enable that mode

Also do better documentation of the enum geni_se_xfer_mode.

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20210625052213.32260-3-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

diff --git a/drivers/soc/qcom/qcom-geni-se.c b/drivers/soc/qcom/qcom-geni-se.c
index fe666ea0c487335c80000209d4556c77ed702a52..7d649d2cf31e0432e729dcaee6b00d752a4d5f8d 100644 (file)
--- a/drivers/soc/qcom/qcom-geni-se.c
+++ b/drivers/soc/qcom/qcom-geni-se.c
@@ -321,6 +321,30 @@ static void geni_se_select_dma_mode(struct geni_se *se)
                writel_relaxed(val, se->base + SE_GENI_DMA_MODE_EN);
 }
 
+static void geni_se_select_gpi_mode(struct geni_se *se)
+{
+       u32 val;
+
+       geni_se_irq_clear(se);
+
+       writel(0, se->base + SE_IRQ_EN);
+
+       val = readl(se->base + SE_GENI_S_IRQ_EN);
+       val &= ~S_CMD_DONE_EN;
+       writel(val, se->base + SE_GENI_S_IRQ_EN);
+
+       val = readl(se->base + SE_GENI_M_IRQ_EN);
+       val &= ~(M_CMD_DONE_EN | M_TX_FIFO_WATERMARK_EN |
+                M_RX_FIFO_WATERMARK_EN | M_RX_FIFO_LAST_EN);
+       writel(val, se->base + SE_GENI_M_IRQ_EN);
+
+       writel(GENI_DMA_MODE_EN, se->base + SE_GENI_DMA_MODE_EN);
+
+       val = readl(se->base + SE_GSI_EVENT_EN);
+       val |= (DMA_RX_EVENT_EN | DMA_TX_EVENT_EN | GENI_M_EVENT_EN | GENI_S_EVENT_EN);
+       writel(val, se->base + SE_GSI_EVENT_EN);
+}
+
 /**
  * geni_se_select_mode() - Select the serial engine transfer mode
  * @se:                Pointer to the concerned serial engine.
@@ -328,7 +352,7 @@ static void geni_se_select_dma_mode(struct geni_se *se)
  */
 void geni_se_select_mode(struct geni_se *se, enum geni_se_xfer_mode mode)
 {
-       WARN_ON(mode != GENI_SE_FIFO && mode != GENI_SE_DMA);
+       WARN_ON(mode != GENI_SE_FIFO && mode != GENI_SE_DMA && mode != GENI_GPI_DMA);
 
        switch (mode) {
        case GENI_SE_FIFO:
@@ -337,6 +361,9 @@ void geni_se_select_mode(struct geni_se *se, enum geni_se_xfer_mode mode)
        case GENI_SE_DMA:
                geni_se_select_dma_mode(se);
                break;
+       case GENI_GPI_DMA:
+               geni_se_select_gpi_mode(se);
+               break;
        case GENI_SE_INVALID:
        default:
                break;

diff --git a/include/linux/qcom-geni-se.h b/include/linux/qcom-geni-se.h
index 5114e2144b171ce5c96025e5106524a035470eb0..f5672785c0c4a4a9f6b956f21ca4f279dca833c8 100644 (file)
--- a/include/linux/qcom-geni-se.h
+++ b/include/linux/qcom-geni-se.h
@@ -8,11 +8,24 @@
 
 #include <linux/interconnect.h>
 
-/* Transfer mode supported by GENI Serial Engines */
+/**
+ * enum geni_se_xfer_mode: Transfer modes supported by Serial Engines
+ *
+ * @GENI_SE_INVALID: Invalid mode
+ * @GENI_SE_FIFO: FIFO mode. Data is transferred with SE FIFO
+ * by programmed IO method
+ * @GENI_SE_DMA: Serial Engine DMA mode. Data is transferred
+ * with SE by DMAengine internal to SE
+ * @GENI_GPI_DMA: GPI DMA mode. Data is transferred using a DMAengine
+ * configured by a firmware residing on a GSI engine. This DMA name is
+ * interchangeably used as GSI or GPI which seem to imply the same DMAengine
+ */
+
 enum geni_se_xfer_mode {
        GENI_SE_INVALID,
        GENI_SE_FIFO,
        GENI_SE_DMA,
+       GENI_GPI_DMA,
 };
 
 /* Protocols supported by GENI Serial Engines */