drm/i915/psr: Avoid any PSR stuff on platforms without support.
authorRodrigo Vivi <rodrigo.vivi@intel.com>
Thu, 7 Sep 2017 23:00:31 +0000 (16:00 -0700)
committerRodrigo Vivi <rodrigo.vivi@intel.com>
Mon, 11 Sep 2017 22:24:34 +0000 (15:24 -0700)
We really don't want to setup vfuncs and lock mutexes on
platforms that has no support to PSR.

Also we know what platforms they are so let's do it quietly.

Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Cc: Vathsala Nagaraju <vathsala.nagaraju@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20170907230041.22978-2-rodrigo.vivi@intel.com
drivers/gpu/drm/i915/intel_psr.c

index f62ab05d3d629ef3eeb37c18fa39c5a3eb1ca33e..60a1ece6d4c9556a468eac86137fde853a483c3f 100644 (file)
@@ -496,10 +496,8 @@ void intel_psr_enable(struct intel_dp *intel_dp,
        enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
        u32 chicken;
 
-       if (!HAS_PSR(dev_priv)) {
-               DRM_DEBUG_KMS("PSR not supported on this platform\n");
+       if (!HAS_PSR(dev_priv))
                return;
-       }
 
        if (!is_edp_psr(intel_dp)) {
                DRM_DEBUG_KMS("PSR not supported by this panel\n");
@@ -678,6 +676,9 @@ void intel_psr_disable(struct intel_dp *intel_dp,
        struct drm_device *dev = intel_dig_port->base.base.dev;
        struct drm_i915_private *dev_priv = to_i915(dev);
 
+       if (!HAS_PSR(dev_priv))
+               return;
+
        mutex_lock(&dev_priv->psr.lock);
        if (!dev_priv->psr.enabled) {
                mutex_unlock(&dev_priv->psr.lock);
@@ -829,6 +830,9 @@ void intel_psr_single_frame_update(struct drm_i915_private *dev_priv,
        enum pipe pipe;
        u32 val;
 
+       if (!HAS_PSR(dev_priv))
+               return;
+
        /*
         * Single frame update is already supported on BDW+ but it requires
         * many W/A and it isn't really needed.
@@ -875,6 +879,9 @@ void intel_psr_invalidate(struct drm_i915_private *dev_priv,
        struct drm_crtc *crtc;
        enum pipe pipe;
 
+       if (!HAS_PSR(dev_priv))
+               return;
+
        mutex_lock(&dev_priv->psr.lock);
        if (!dev_priv->psr.enabled) {
                mutex_unlock(&dev_priv->psr.lock);
@@ -912,6 +919,9 @@ void intel_psr_flush(struct drm_i915_private *dev_priv,
        struct drm_crtc *crtc;
        enum pipe pipe;
 
+       if (!HAS_PSR(dev_priv))
+               return;
+
        mutex_lock(&dev_priv->psr.lock);
        if (!dev_priv->psr.enabled) {
                mutex_unlock(&dev_priv->psr.lock);
@@ -944,6 +954,9 @@ void intel_psr_flush(struct drm_i915_private *dev_priv,
  */
 void intel_psr_init(struct drm_i915_private *dev_priv)
 {
+       if (!HAS_PSR(dev_priv))
+               return;
+
        dev_priv->psr_mmio_base = IS_HASWELL(dev_priv) ?
                HSW_EDP_PSR_BASE : BDW_EDP_PSR_BASE;