bpf, tests: Add more ALU32 tests for BPF_LSH/RSH/ARSH
authorJohan Almbladh <johan.almbladh@anyfinetworks.com>
Mon, 9 Aug 2021 09:18:20 +0000 (11:18 +0200)
committerDaniel Borkmann <daniel@iogearbox.net>
Tue, 10 Aug 2021 09:33:05 +0000 (11:33 +0200)
This patch adds more tests of ALU32 shift operations BPF_LSH and BPF_RSH,
including the special case of a zero immediate. Also add corresponding
BPF_ARSH tests which were missing for ALU32.

Signed-off-by: Johan Almbladh <johan.almbladh@anyfinetworks.com>
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
Acked-by: Yonghong Song <yhs@fb.com>
Link: https://lore.kernel.org/bpf/20210809091829.810076-6-johan.almbladh@anyfinetworks.com
lib/test_bpf.c

index 73c2ea0cb13b7246e1d73dc14b6eb9454f63c980..8694b1fb8ff2ca57434e1bc611123897257d7247 100644 (file)
@@ -4103,6 +4103,18 @@ static struct bpf_test tests[] = {
                { },
                { { 0, 0x80000000 } },
        },
+       {
+               "ALU_LSH_X: 0x12345678 << 12 = 0x45678000",
+               .u.insns_int = {
+                       BPF_ALU32_IMM(BPF_MOV, R0, 0x12345678),
+                       BPF_ALU32_IMM(BPF_MOV, R1, 12),
+                       BPF_ALU32_REG(BPF_LSH, R0, R1),
+                       BPF_EXIT_INSN(),
+               },
+               INTERNAL,
+               { },
+               { { 0, 0x45678000 } }
+       },
        {
                "ALU64_LSH_X: 1 << 1 = 2",
                .u.insns_int = {
@@ -4150,6 +4162,28 @@ static struct bpf_test tests[] = {
                { },
                { { 0, 0x80000000 } },
        },
+       {
+               "ALU_LSH_K: 0x12345678 << 12 = 0x45678000",
+               .u.insns_int = {
+                       BPF_ALU32_IMM(BPF_MOV, R0, 0x12345678),
+                       BPF_ALU32_IMM(BPF_LSH, R0, 12),
+                       BPF_EXIT_INSN(),
+               },
+               INTERNAL,
+               { },
+               { { 0, 0x45678000 } }
+       },
+       {
+               "ALU_LSH_K: 0x12345678 << 0 = 0x12345678",
+               .u.insns_int = {
+                       BPF_ALU32_IMM(BPF_MOV, R0, 0x12345678),
+                       BPF_ALU32_IMM(BPF_LSH, R0, 0),
+                       BPF_EXIT_INSN(),
+               },
+               INTERNAL,
+               { },
+               { { 0, 0x12345678 } }
+       },
        {
                "ALU64_LSH_K: 1 << 1 = 2",
                .u.insns_int = {
@@ -4197,6 +4231,18 @@ static struct bpf_test tests[] = {
                { },
                { { 0, 1 } },
        },
+       {
+               "ALU_RSH_X: 0x12345678 >> 20 = 0x123",
+               .u.insns_int = {
+                       BPF_ALU32_IMM(BPF_MOV, R0, 0x12345678),
+                       BPF_ALU32_IMM(BPF_MOV, R1, 20),
+                       BPF_ALU32_REG(BPF_RSH, R0, R1),
+                       BPF_EXIT_INSN(),
+               },
+               INTERNAL,
+               { },
+               { { 0, 0x123 } }
+       },
        {
                "ALU64_RSH_X: 2 >> 1 = 1",
                .u.insns_int = {
@@ -4244,6 +4290,28 @@ static struct bpf_test tests[] = {
                { },
                { { 0, 1 } },
        },
+       {
+               "ALU_RSH_K: 0x12345678 >> 20 = 0x123",
+               .u.insns_int = {
+                       BPF_ALU32_IMM(BPF_MOV, R0, 0x12345678),
+                       BPF_ALU32_IMM(BPF_RSH, R0, 20),
+                       BPF_EXIT_INSN(),
+               },
+               INTERNAL,
+               { },
+               { { 0, 0x123 } }
+       },
+       {
+               "ALU_RSH_K: 0x12345678 >> 0 = 0x12345678",
+               .u.insns_int = {
+                       BPF_ALU32_IMM(BPF_MOV, R0, 0x12345678),
+                       BPF_ALU32_IMM(BPF_RSH, R0, 0),
+                       BPF_EXIT_INSN(),
+               },
+               INTERNAL,
+               { },
+               { { 0, 0x12345678 } }
+       },
        {
                "ALU64_RSH_K: 2 >> 1 = 1",
                .u.insns_int = {
@@ -4267,6 +4335,18 @@ static struct bpf_test tests[] = {
                { { 0, 1 } },
        },
        /* BPF_ALU | BPF_ARSH | BPF_X */
+       {
+               "ALU32_ARSH_X: -1234 >> 7 = -10",
+               .u.insns_int = {
+                       BPF_ALU32_IMM(BPF_MOV, R0, -1234),
+                       BPF_ALU32_IMM(BPF_MOV, R1, 7),
+                       BPF_ALU32_REG(BPF_ARSH, R0, R1),
+                       BPF_EXIT_INSN(),
+               },
+               INTERNAL,
+               { },
+               { { 0, -10 } }
+       },
        {
                "ALU_ARSH_X: 0xff00ff0000000000 >> 40 = 0xffffffffffff00ff",
                .u.insns_int = {
@@ -4280,6 +4360,28 @@ static struct bpf_test tests[] = {
                { { 0, 0xffff00ff } },
        },
        /* BPF_ALU | BPF_ARSH | BPF_K */
+       {
+               "ALU32_ARSH_K: -1234 >> 7 = -10",
+               .u.insns_int = {
+                       BPF_ALU32_IMM(BPF_MOV, R0, -1234),
+                       BPF_ALU32_IMM(BPF_ARSH, R0, 7),
+                       BPF_EXIT_INSN(),
+               },
+               INTERNAL,
+               { },
+               { { 0, -10 } }
+       },
+       {
+               "ALU32_ARSH_K: -1234 >> 0 = -1234",
+               .u.insns_int = {
+                       BPF_ALU32_IMM(BPF_MOV, R0, -1234),
+                       BPF_ALU32_IMM(BPF_ARSH, R0, 0),
+                       BPF_EXIT_INSN(),
+               },
+               INTERNAL,
+               { },
+               { { 0, -1234 } }
+       },
        {
                "ALU_ARSH_K: 0xff00ff0000000000 >> 40 = 0xffffffffffff00ff",
                .u.insns_int = {