arm64: dts: ti: k3-am64-sk: Fixup reference to phandles array

When referring to array of phandles, using <> to separate the array
entries is better notation as it makes potential errors with phandle and
cell arguments easier to catch. Fix the outliers to be consistent with
the rest of the usage.

Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20230606182220.3661956-12-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
index 9ea012b883e8aa334045c2886c13e647ab98d82a..3e27bd65cb2e9b63fb5598f676464bf3b328d444 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
@@ -480,8 +480,7 @@
 
 &cpsw3g {
        pinctrl-names = "default";
-       pinctrl-0 = <&rgmii1_pins_default
-                    &rgmii2_pins_default>;
+       pinctrl-0 = <&rgmii1_pins_default>, <&rgmii2_pins_default>;
 };
 
 &cpsw_port1 {
@@ -613,25 +612,25 @@
 };
 
 &main_r5fss0_core0 {
-       mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core0>;
+       mboxes = <&mailbox0_cluster2>, <&mbox_main_r5fss0_core0>;
        memory-region = <&main_r5fss0_core0_dma_memory_region>,
                        <&main_r5fss0_core0_memory_region>;
 };
 
 &main_r5fss0_core1 {
-       mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core1>;
+       mboxes = <&mailbox0_cluster2>, <&mbox_main_r5fss0_core1>;
        memory-region = <&main_r5fss0_core1_dma_memory_region>,
                        <&main_r5fss0_core1_memory_region>;
 };
 
 &main_r5fss1_core0 {
-       mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core0>;
+       mboxes = <&mailbox0_cluster4>, <&mbox_main_r5fss1_core0>;
        memory-region = <&main_r5fss1_core0_dma_memory_region>,
                        <&main_r5fss1_core0_memory_region>;
 };
 
 &main_r5fss1_core1 {
-       mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core1>;
+       mboxes = <&mailbox0_cluster4>, <&mbox_main_r5fss1_core1>;
        memory-region = <&main_r5fss1_core1_dma_memory_region>,
                        <&main_r5fss1_core1_memory_region>;
 };