ARM: dts: at91: shdwc binding: add new shutdown controller documentation

The new shutdown controller compatible with sama5d2 has a new binding
documentation and properties.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sebastian Reichel <sre@kernel.org>

diff --git a/Documentation/devicetree/bindings/arm/atmel-at91.txt b/Documentation/devicetree/bindings/arm/atmel-at91.txt
index 7fd64ec9ee1d5dcf78f1c1ff241a7b39f31da4f6..2f5a07b32fb781d89d94d5f947dc121aee2c9c0a 100644 (file)
--- a/Documentation/devicetree/bindings/arm/atmel-at91.txt
+++ b/Documentation/devicetree/bindings/arm/atmel-at91.txt
@@ -147,6 +147,65 @@ Example:
                clocks = <&clk32k>;
        };
 
+SHDWC SAMA5D2-Compatible Shutdown Controller
+
+1) shdwc node
+
+required properties:
+- compatible: should be "atmel,sama5d2-shdwc".
+- reg: should contain registers location and length
+- clocks: phandle to input clock.
+- #address-cells: should be one. The cell is the wake-up input index.
+- #size-cells: should be zero.
+
+optional properties:
+
+- debounce-delay-us: minimum wake-up inputs debouncer period in
+  microseconds. It's usually a board-related property.
+- atmel,wakeup-rtc-timer: boolean to enable Real-Time Clock wake-up.
+
+The node contains child nodes for each wake-up input that the platform uses.
+
+2) input nodes
+
+Wake-up input nodes are usually described in the "board" part of the Device
+Tree. Note also that input 0 is linked to the wake-up pin and is frequently
+used.
+
+Required properties:
+- reg: should contain the wake-up input index [0 - 15].
+
+Optional properties:
+- atmel,wakeup-active-high: boolean, the corresponding wake-up input described
+  by the child, forces the wake-up of the core power supply on a high level.
+  The default is to be active low.
+
+Example:
+
+On the SoC side:
+       shdwc@f8048010 {
+               compatible = "atmel,sama5d2-shdwc";
+               reg = <0xf8048010 0x10>;
+               clocks = <&clk32k>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               atmel,wakeup-rtc-timer;
+       };
+
+On the board side:
+       shdwc@f8048010 {
+               debounce-delay-us = <976>;
+
+               input@0 {
+                       reg = <0>;
+               };
+
+               input@1 {
+                       reg = <1>;
+                       atmel,wakeup-active-high;
+               };
+       };
+
 Special Function Registers (SFR)
 
 Special Function Registers (SFR) manage specific aspects of the integrated