drm/i915/irq: split out i965_display_irq_postinstall()

Split out i965_display_irq_postinstall() similar to other platforms.

Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com>
Link: https://lore.kernel.org/r/5d404dcd0c606d1cb11f2e09c45e151a75b5b2c6.1746536745.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>

diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
index 77cdd1ea5d00b8f2e9cc3dc05b4e92b285991b24..989b78339aa49afb6e554cb604dcea15d10514c0 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
@@ -1918,6 +1918,23 @@ void i915_display_irq_postinstall(struct intel_display *display)
        i915_enable_asle_pipestat(display);
 }
 
+void i965_display_irq_postinstall(struct intel_display *display)
+{
+       struct drm_i915_private *dev_priv = to_i915(display->drm);
+
+       /*
+        * Interrupt setup is already guaranteed to be single-threaded, this is
+        * just to make the assert_spin_locked check happy.
+        */
+       spin_lock_irq(&dev_priv->irq_lock);
+       i915_enable_pipestat(display, PIPE_A, PIPE_GMBUS_INTERRUPT_STATUS);
+       i915_enable_pipestat(display, PIPE_A, PIPE_CRC_DONE_INTERRUPT_STATUS);
+       i915_enable_pipestat(display, PIPE_B, PIPE_CRC_DONE_INTERRUPT_STATUS);
+       spin_unlock_irq(&dev_priv->irq_lock);
+
+       i915_enable_asle_pipestat(display);
+}
+
 static u32 vlv_error_mask(void)
 {
        /* TODO enable other errors too? */

diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.h b/drivers/gpu/drm/i915/display/intel_display_irq.h
index 8fdce804c9d7a4e1de6ef3b2a15286bad93f3a0c..4c0ed476e568613053ff2b6e9c2c7625743ea09f 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display_irq.h
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.h
@@ -62,6 +62,7 @@ void gen8_display_irq_reset(struct intel_display *display);
 void gen11_display_irq_reset(struct intel_display *display);
 
 void i915_display_irq_postinstall(struct intel_display *display);
+void i965_display_irq_postinstall(struct intel_display *display);
 void vlv_display_irq_postinstall(struct intel_display *display);
 void ilk_de_irq_postinstall(struct intel_display *display);
 void gen8_de_irq_postinstall(struct intel_display *display);

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 30c78177ae0d32a439ab68617b663096173d4b67..95042879bec4a363b6453b6b379de2fc72ed7d4c 100644 (file)
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1053,15 +1053,7 @@ static void i965_irq_postinstall(struct drm_i915_private *dev_priv)
 
        gen2_irq_init(uncore, GEN2_IRQ_REGS, dev_priv->irq_mask, enable_mask);
 
-       /* Interrupt setup is already guaranteed to be single-threaded, this is
-        * just to make the assert_spin_locked check happy. */
-       spin_lock_irq(&dev_priv->irq_lock);
-       i915_enable_pipestat(display, PIPE_A, PIPE_GMBUS_INTERRUPT_STATUS);
-       i915_enable_pipestat(display, PIPE_A, PIPE_CRC_DONE_INTERRUPT_STATUS);
-       i915_enable_pipestat(display, PIPE_B, PIPE_CRC_DONE_INTERRUPT_STATUS);
-       spin_unlock_irq(&dev_priv->irq_lock);
-
-       i915_enable_asle_pipestat(display);
+       i965_display_irq_postinstall(display);
 }
 
 static irqreturn_t i965_irq_handler(int irq, void *arg)