drm/i915: Fix doc build issue on intel_cdclk.c
authorRodrigo Vivi <rodrigo.vivi@intel.com>
Wed, 21 Feb 2024 15:54:53 +0000 (10:54 -0500)
committerRodrigo Vivi <rodrigo.vivi@intel.com>
Fri, 23 Feb 2024 14:07:18 +0000 (09:07 -0500)
Fixing some doc build issues:

Documentation/gpu/i915:222: drivers/gpu/drm/i915/display/intel_cdclk.c:69: ERROR: Unexpected indentation.
Documentation/gpu/i915:222: ./drivers/gpu/drm/i915/display/intel_cdclk.c:70: WARNING: Block quote ends without a blank line; unexpected unindent.

v2: Minimize the empty lines (Gustavo)

Closes: https://lore.kernel.org/all/20240219161747.0e867406@canb.auug.org.au/
Fixes: 79e2ea2eaaa6 ("drm/i915/cdclk: Document CDCLK update methods")
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Gustavo Sousa <gustavo.sousa@intel.com>
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240221155453.94208-1-rodrigo.vivi@intel.com
drivers/gpu/drm/i915/display/intel_cdclk.c

index 30dae4fef6cb056020b4ab81e0aae2db70519324..ed89b86ea625aaa408064916b982ffa92f9ef4b5 100644 (file)
@@ -65,6 +65,7 @@
  *
  * Several methods exist to change the CDCLK frequency, which ones are
  * supported depends on the platform:
+ *
  * - Full PLL disable + re-enable with new VCO frequency. Pipes must be inactive.
  * - CD2X divider update. Single pipe can be active as the divider update
  *   can be synchronized with the pipe's start of vblank.