ARM: dts: aspeed: mtmitchell: Add Riser cards

Define the I2C alias ports for the riser cards.

Add the i2c muxes to switch to the i2c alias ports and
the eeprom nodes to read the FRU contents on riser cards.

Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
Link: https://lore.kernel.org/r/20240806071806.1666550-4-chanh@os.amperecomputing.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>

diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts
index 1679911e4fd82cdbc918a1af336812c02e99c75a..4d2f6e5348ce8341bca21a93fad8ed6a1a19b1c5 100644 (file)
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts
@@ -29,6 +29,18 @@
                i2c30 = &ocpslot_0;
                i2c31 = &ocpslot_1;
 
+               /*
+                *  i2c bus 32-33 assigned to Riser slot 0-1
+                */
+               i2c32 = &i2c_riser0;
+               i2c33 = &i2c_riser1;
+
+               /*
+                *  i2c bus 38-39 assigned to FRU on Riser slot 0-1
+                */
+               i2c38 = &i2c_riser0_chn_0;
+               i2c39 = &i2c_riser1_chn_0;
+
                /*
                 *  I2C NVMe alias port
                 */
@@ -551,6 +563,58 @@
                                reg = <0x1f>;
                        };
                };
+
+               i2c_riser0: i2c@2 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <0x2>;
+
+                       i2c-mux@72 {
+                               compatible = "nxp,pca9546";
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               reg = <0x72>;
+                               i2c-mux-idle-disconnect;
+
+                               i2c_riser0_chn_0: i2c@0 {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+                                       reg = <0x0>;
+
+                                       eeprom@50 {
+                                               compatible = "atmel,24c02";
+                                               reg = <0x50>;
+                                               pagesize = <16>;
+                                       };
+                               };
+                       };
+               };
+
+               i2c_riser1: i2c@3 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <0x3>;
+
+                       i2c-mux@72 {
+                               compatible = "nxp,pca9546";
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               reg = <0x72>;
+                               i2c-mux-idle-disconnect;
+
+                               i2c_riser1_chn_0: i2c@0 {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+                                       reg = <0x0>;
+
+                                       eeprom@50 {
+                                               compatible = "atmel,24c02";
+                                               reg = <0x50>;
+                                               pagesize = <16>;
+                                       };
+                               };
+                       };
+               };
        };
 };