Use the "Q" instead of "R" constraint to correctly reflect the instruction
format of the tm instruction: the first operand is a memory reference
without index register and short displacement. The "R" constraint indicates
a memory reference with index register instead.
This may lead to compile errors like:
arch/s390/include/asm/bitops.h: Assembler messages:
arch/s390/include/asm/bitops.h:60: Error: operand 1: syntax error; missing ')' after base register
arch/s390/include/asm/bitops.h:60: Error: operand 2: syntax error; ')' not allowed here
arch/s390/include/asm/bitops.h:60: Error: junk at end of line: `,4'
Reported-by: Nathan Chancellor <nathan@kernel.org>
Closes: https://lore.kernel.org/r/
20250122-s390-fix-std-for-gcc-15-v1-1-
8b00cadee083@kernel.org
Fixes:
b2bc1b1a77c0 ("s390/bitops: Provide optimized arch_test_bit()")
Acked-by: Alexander Gordeev <agordeev@linux.ibm.com>
Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
Signed-off-by: Alexander Gordeev <agordeev@linux.ibm.com>
asm volatile(
" tm %[addr],%[mask]\n"
: "=@cc" (cc)
- : [addr] "R" (*addr), [mask] "I" (mask)
+ : [addr] "Q" (*addr), [mask] "I" (mask)
);
return cc == 3;
}