drm/i915/snps: pass encoder to intel_snps_phy_update_psr_power_state()

Pass encoder to intel_snps_phy_update_psr_power_state(). The encoder
will be more helpful than just port in the subsequent changes.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/4711919a9834cf4a49fd665009ba9d44b4b42bc4.1710949619.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 747761efa4be929a1080c34b8d8dee00e54be1ee..3f35572354ba1aafff1ac0a36eaf1eda79c001c2 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1724,7 +1724,6 @@ static void intel_psr_enable_locked(struct intel_dp *intel_dp,
 {
        struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
        struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
-       enum phy phy = intel_port_to_phy(dev_priv, dig_port->base.port);
        u32 val;
 
        drm_WARN_ON(&dev_priv->drm, intel_dp->psr.enabled);
@@ -1752,7 +1751,7 @@ static void intel_psr_enable_locked(struct intel_dp *intel_dp,
                drm_dbg_kms(&dev_priv->drm, "Enabling PSR%s\n",
                            intel_dp->psr.psr2_enabled ? "2" : "1");
 
-       intel_snps_phy_update_psr_power_state(dev_priv, phy, true);
+       intel_snps_phy_update_psr_power_state(&dig_port->base, true);
        intel_psr_enable_sink(intel_dp);
        intel_psr_enable_source(intel_dp, crtc_state);
        intel_dp->psr.enabled = true;
@@ -1823,8 +1822,6 @@ static void intel_psr_disable_locked(struct intel_dp *intel_dp)
 {
        struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
        enum transcoder cpu_transcoder = intel_dp->psr.transcoder;
-       enum phy phy = intel_port_to_phy(dev_priv,
-                                        dp_to_dig_port(intel_dp)->base.port);
 
        lockdep_assert_held(&intel_dp->psr.lock);
 
@@ -1859,7 +1856,7 @@ static void intel_psr_disable_locked(struct intel_dp *intel_dp)
                                     CLKGATE_DIS_MISC_DMASC_GATING_DIS, 0);
        }
 
-       intel_snps_phy_update_psr_power_state(dev_priv, phy, false);
+       intel_snps_phy_update_psr_power_state(&dp_to_dig_port(intel_dp)->base, false);
 
        /* Disable PSR on Sink */
        drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG, 0);

diff --git a/drivers/gpu/drm/i915/display/intel_snps_phy.c b/drivers/gpu/drm/i915/display/intel_snps_phy.c
index bc61e736f9b32e609add0bb46b327959de5cf9e0..7fc0022684827df61c2e9aa30b67657f28adc564 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_snps_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_snps_phy.c
@@ -44,9 +44,11 @@ void intel_snps_phy_wait_for_calibration(struct drm_i915_private *i915)
        }
 }
 
-void intel_snps_phy_update_psr_power_state(struct drm_i915_private *i915,
-                                          enum phy phy, bool enable)
+void intel_snps_phy_update_psr_power_state(struct intel_encoder *encoder,
+                                          bool enable)
 {
+       struct drm_i915_private *i915 = to_i915(encoder->base.dev);
+       enum phy phy = intel_port_to_phy(i915, encoder->port);
        u32 val;
 
        if (!intel_phy_is_snps(i915, phy))

diff --git a/drivers/gpu/drm/i915/display/intel_snps_phy.h b/drivers/gpu/drm/i915/display/intel_snps_phy.h
index 515abf7c5902709ea6419ccee95bc1c1995a7e47..bc08b92a7cd96f3536d6f0fe6272eb95a1eca635 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_snps_phy.h
+++ b/drivers/gpu/drm/i915/display/intel_snps_phy.h
@@ -17,8 +17,8 @@ struct intel_mpllb_state;
 enum phy;
 
 void intel_snps_phy_wait_for_calibration(struct drm_i915_private *dev_priv);
-void intel_snps_phy_update_psr_power_state(struct drm_i915_private *dev_priv,
-                                          enum phy phy, bool enable);
+void intel_snps_phy_update_psr_power_state(struct intel_encoder *encoder,
+                                          bool enable);
 
 int intel_mpllb_calc_state(struct intel_crtc_state *crtc_state,
                           struct intel_encoder *encoder);